This is the second post on the second Samsung Foundry Day held recently. The first was Samsung Foundry Forum: Roadmaps . This post is all about EUV. Since all EUV scanners are supplied by ASML, most of what one manufacturer says applies to all of them, so even for non-Samsung customers, this is interesting material. EUV Readiness Seong-Sue Kim talked about EUV readiness for 7nm manufacturing. It looks like Samsung will be the first to bring EUV into a production manufacturing process. At IEDM in December, Samsung presented a joint paper along with GLOBALFOUNDRIES and IBM on an EUV-based 7nm process. Whether GLOBALFOUNDRIES will use EUV at 7nm is unclear, and, of course, IBM no longer has any in-house manufacturing, only research. The big gain of EUV, of course, is the reduction in mask count that comes from using 14nm light instead of 193nm light, and thus a much reduced requirement for double patterning. There is a 30% reduction in mask count using EUV versus traditional immersion lithography. In addition, there is a much wider process window and there is smaller CD variation. One big gain is that EUV allows bi-directional patterning of M1 at 7nm (both horizontal and vertical routing), which makes standard cell design a lot easier (not to mention smaller). Samsung is using 36nm pitch at 7nm with EUV. Before going into the details, let me add a tutorial paragraph about how EUV works. As Dave Barry would regularly say when he had his column, I promise I am not making this up. The diagram above shows the EUV generator. To the right is the rest of the scanner where the wafer is. There are also half a dozen mirrors to control the light, one of which is patterned with the image to be exposed, and is called the mask even though it is now reflective. The entire system is in a full vacuum since everything absorbs EUV light, even air. Not to mention lenses, which is why all the optics has to be reflective. The EUV itself is generated by dropping molten tin (about 50,000 drops per second), hitting each tin drop with one laser to shape it, and then with a second really powerful one to vaporize it. This generates some EUV light from the plasma. Behind the generator is a big mirror called the collector, and that focuses the light at the intermediate focus and then on into the rest of the scanner. The mirrors are not like the mirror in your bathroom (that would absorb EUV, too) but are made up of layers of semi-reflective material that causes optical interference, and about 30% of the light is reflected. So eventually about 3-5% of the light ends up hitting the photoresist on the wafer. There are a number of challenges with EUV due to the equipment. As I have written about before (see, for example, EUV Might Really Happen ), I see four big challenges: Source power (if it is too low, wafers cannot be exposed fast enough to be economically interesting) Pellicle (if defects end up on the mask, they will print. A pellicle moves them out of the optical plane but almost everything absorbs EUV light so there are not a lot of choices of material for the pellicle) Defect-free masks (defect-free mask blanks are really hard to achieve, so repair and other avoidance techniques are needed) Equipment availability (obviously if the equipment spends half its time not working, then throughput is down, costs are up, and the floorspace required for a given capacity increases) So how are things going on these challenges? Source power goal of 250W has been demonstrated (the previous week). At last November's Foundry Forum, Samsung reported it was up to 140W, but in last six months there has been a huge improvement. One problem was with the tin target, where about 20% of CO2 laser reflected back into the laser system and could be reused for the next pulse but the system gets destabilized. in the last six months, a new optical switch has been added to close off and get to 250W. The news was just days old during the meeting, but the results were that they had achieved 250W of EUV power for one hour with a die yield of >99.9%. The reason power is so important is that it pushes up the rate at which wafers can be patterned. They will be able to do 140WPH with 250W (currently 104WPH at 140W). The experience of availability is good, and Samsung is confident the overall availability will be above 90% by the end of 2018. A couple of other developments. There have been improvements to the droplet generator lifetime with in-line tin refill. Collector contamination has been improved with a new chamber with optimized flow and temperature control. Both imaging and overlay of the NXE3400 (the latest scanner) satisfies the 7nm production goal. There is improved illumination, optics aberration reduction, focus control mask, and wafer heating control implemented. There is progress in resist, meeting resolution, and line edge roughness (LER) requirements for 7nm. Pellicle film has been produced without printable defects. Remaining issues are transmittance and lifetime at high source power. But pellicle is no longer a showstopper. A wafer scrap rate of less than 2% is achievable without a pellicle, even when the mask gets contaminated. Two problems with the EUV mask (which is actually a mirror) are defects and lifetime. Defect-free fabrication is achievable using mask defect avoidance or MDA (moving the pattern so the defects fall in parts of the mask that is obscured by pattern) and by blank defect reduction (manufacturing blanks that have only a few defects). A lifetime of 10M wafer exposures of the mask have been achieved with new cleaning chemicals and selective etching. Samsung have an in-house EUV mask imaging system, complete with infrastructure for MDA and repair verification. Manufacturability requires mass production products, but Samsung has memory and so can use that to assess effectiveness. Bottom Line EUV benefits are confirmed and 7nm is on track. Samsung will enable the success of the first HVM in the industry using EUV. The final post on the Samsung Foundry Forum, looking at the FD-SOI side, and also what comes after FinFET, will appear tomorrow.![]()
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