Accurate Pin-to-Pin Resistance Modeling for Wide, Slotted Metal Structures...
In Analog/RF layouts, designers frequently use slotted metal structures. Such slotting is done either to satisfy DRC requirements from foundries to satisfy max. density rule criteria, or to reduce......
View ArticleTensilica at CES
Tensilica has been attending CES for many years, before it was acquired by Cadence. The focus used to be on audio processing, with the HiFi family of processors. In fact, as I said in my preview...
View ArticleAMD Keynote at CES
As I said in my post about CES last week (see my post Consumer Electronics: 5G, AI, and Air Taxis ), I'm not sure if can read anything into it but the "semiconductor" keynote was given... [[ Click on...
View ArticleVerification of ML IP and Specman—Our Hackathon Project
If you are lucky enough and your company spends a few working days each year on a Hackathon, you must know that it is usually a lot of fun. The latest 2018 Hackathon in Cadence was all about Machine......
View ArticleDesignCon 2019: Is this the Year?
2019 has started --- is this the year of advanced packaging, where system design enablement shifts to the package? If you are attending DesignCon (designcon.com) in Santa Clara, California, in a few......
View ArticleAlphaZero: Four Hours to World Class from a Standing Start
Last year I wrote about AlphaZero in my post Deep Blue, AlphaGo, and AlphaZero . A quick recap to jog your memory, or read that earlier post for more detail. Deep Blue was the program developed by......
View ArticleIEDM: EUV, the Road to HVM and Beyond
At IEDM in December, the Sunday preceding the conference proper consists of two short courses, traditionally one logic-related and one memory-related. I always attend the logic one, since that is...
View ArticleVirtuosity: What's New in Run Plan – Part III
After two interesting blogs by Yagya Mishra that explained the most popular features of the Run Plan assistant in Virtuoso® ADE Assembler , I am writing this third blog in the series to share... [[...
View ArticleCadence Sigrity at DesignCon 2019
Happy new year! We want to invite you to visit us in booth 711 on the DesignCon Expo floor. Learn about how we can address your design challenges with Cadence ® Sigrity signal integrity and... [[ Click...
View ArticleMLK Off-topic: The Lady with the Polar Chart
It's Martin Luther King day on Monday, and Cadence is off. I think that this is the first time I have ever got it as a holiday, rather than moving it to somewhere like July 3rd. Breakfast Bytes... [[...
View ArticleSunday Brunch Video for 20th January 2019
https://youtu.be/Bs5A09med6Q Made at the Cadence campus in the rain (camera Sean) Monday: Tensilica at CES Tuesday: AMD Keynote at CES Wednesday: AlphaZero: Four Hours to World Class from a Standing......
View ArticleA Boost For Fabless Chip Design in India
There was a lot of excitement when the National Policy on Electronics was announced in 2012. However, in the six years that it has been in existence, it has not proven to be very effective in its...
View ArticleDesignCon: The Integrity Show
It's the end of January and that means DesignCon. It is January 29th to 31st in the Santa Clara Convention Center. Increasingly, the design of high-end PCBs is all about integrity: signal... [[ Click...
View ArticleThe Cadence Women in Technology Scholarship Winners
Cadence is committed to building a culture that fosters inclusion and embraces diverse backgrounds, experiences, and ideas. Diversity in thought leads to diversity in innovation. But the gender gap......
View ArticleWhy the Nation That Invented the Computer Lost Its Lead
Last month I wrote about a piece that Lynn Conway wrote for IEEE Computer Magazine. See my post The Conway Disappearance Effect . I came across another article in the same issue When Winning Is... [[...
View Article"The First Half of 2019 Is Likely to Be Really Bad"
The title of this post was the single line summary of Dan Niles' quarterly outlook for the semiconductor industry. Dan is the founder and portfolio manager of AlphaOne NexGen Technology Fund.... [[...
View ArticleInsights from the Cadence Women in Technology Scholarship Winners
One of the things that I love about working at Cadence is that Cadence really takes the gender disparity in technology seriously. Cadence supports our women employees with our Women@Cadence group...
View ArticleSpectre Tech Tips: Optimizing Spectre APS Performance
As an analog/mixed-signal designer, verification engineer, or CAD expert, you use Spectre ® APS for analyzing your designs. Do you sometimes wonder if it were possible to optimize Spectre APS... [[...
View ArticleAmazon Go: Just Walk Out Shopping
Last year you probably heard about Amazon Go when it opened in Seattle. This is a store where you install an App on your smartphone, go to the store, use a barcode the App shows to open the...
View ArticleSunday Brunch Video for 27th January 2019
https://youtu.be/1gxIy7TGg3c Made at EBC (camera Sean) Tuesday: DesignCon: The Integrity Show Wednesday: Why the Nation That Invented the Computer Lost Its Lead Thursday: "The First Half of 2019... [[...
View Article