I always find DesignCon a slightly weird conference to attend. I swim in the semiconductor world like a fish swimming in the ocean, and I rarely notice there is land out there too. DesignCon is the conference beyond the chip, about boards. To the extent that there is chip stuff there at all, it tends to be interface IP, power analysis, and so on—all the stuff that the board designer needs to worry about inside the chip. When I wander around DAC or DVCon, there are companies that I have never heard of... but they are all small ones. At DesignCon, there are companies with huge booths that are presumably giants in their part of the industry, but which I am unaware of. Since almost all interfaces these days are very fast multi-lane serial interfaces, walking around the exhibit floor you get the feeling that only three things count: SerDes IP (serializer-deserializer, very fast serial I/O) Signal integrity (to get those serial signals cleanly from one chip to the next) Measurement of very fast serial interfaces (because...eye-diagrams) The PCIe 4 standard is 16Gbps, so that is the number everyone cares about. We at Cadence were no exception, showing off our multi-protocol, multi-link PHY (that I wrote about last week). At the show, we seemed to be the only people brave enough to actually show the hardware working live. We had the test chip (which has 16 lanes) running two lanes into some very expensive looking test hardware showing off how clean the signals are. We were running it at 16Gbps, of course, but apparently it has run faster even though there really isn't anyone to talk to up at that speed, the standards are all 8Gbps and 16Gbps. The importance of this PHY is that it can be used for pretty much any serial protocol, and can be reconfigured to run different protocols on different lanes. So the same chip can support different applications. On the first day of the exhibition, we also announced the latest release of Sigrity, which is the Cadence tool for signal integrity, usable both inside the chip or, of more interest to DesignCon attendees, on the board and through the package. I wrote about that last week, too. DesignCon also has lot of specialist vendors of little pieces of the puzzle of putting together a system: surface mount coaxial connectors, ribbon cables, that sort of thing. One big area, literally in the sense that the booths are big, is equipment for measuring all this stuff. Companies like Tektronix, Teledyne Lecroy, and Keysight (which is the new name for that part of Agilent, which was the new name for that part of Hewlett-Packard) had big booths showing off their wares, especially the most advanced measurement equipment. A rule of thumb in the measurement industry is that if you want to get half-reasonable looking traces that are not very noisy interpolations, then you need to make at least five measurements per bit. Looking at 16Gbps, that means 80B measurements per second, with maybe 8-bit precision. No wonder that cool looking equipment is so expensive. I just looked at the Keysight website and they will sell you an oscilloscope for $1,300 but if you want something that will sample at these very high rates, the price goes up to $201,000. That's quite a range. The opening keynote was by Al Eisaian of InteliAir titled "Key Building Blocks for Thriving in the Era of Exponential Technologies". He was mostly talking about innovation. (See his TED talk from a few years ago .) He cast everything in a "5 C" framework, where the 5 Cs were: Caring Commitment Competence Creativity Community The days of the lonely engineer on his own are over and to achieve pretty much anything these days requires collaboration. Al emphasized the need to be bold and unreasonable to get things done. "There are no failures, only lessons", something I've heard from venture capitalists round here who regard a failed company as a lesson that a (usually) different VC paid for. To wrap up he recommended three books: Strengths Finder 2.0 , Bold , and Finding Your Element . The second day's keynote was from Pat Byrne, the president of Tektronix. When I hear that name I think of graphics terminals, they were the market leader. When I was at VLSI, I had to write the driver to connect our tools to those terminals, and I have to say there was a sizeable gap between what the terminal did and what the documentation said it should do. However, there is no market for standalone graphics terminals any more and Tektronix make measurement equipment. He talked about the challenge of balancing technical, economic and market constraints. Often, if money is no limit, there are things we can do. But for market success, products need to get down to a price point that is a "single-spouse decision" meaning a few hundred dollars. One of the big drivers of cost is communication and the important constraints are energy/bit, dollars/bit, and signal-to-noise ratio (underlying physics). As he put it, "money is made in commercializing the edge of physics in a highly reliable way." Up until now, the world of measurement and the world of design have been largely separate. The designers have their layout editors and simulators and silicon models. The measurement people like Tektronix have the kit. The two industries, simulation and measurement, are about the same size but not integrated. That needs to change. Increasingly the signal that you want to measure is inside the chip (after the SerDes has done its decoding, for example), so modeling needs to be done in the measurement world (a process Pat called de-embedding). Perhaps the biggest change is to validate the entire test plan, including measurement, earlier in the design cycle (shift left) since there isn't time to do one after the other. That is the reality of the world today: chips, cables, boards, system design. Fast cycle time, narrow margins, geographically distributed teams. The third day's keynote was on security by Paul Kocher of Cryptography Research (now part of Rambus). Christine covered that one .![]()
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