Yes, it's nearly here, the 54th Design Automation Conference in Austin, Texas (and by the way, the next DACs will be back in San Francisco and then Vegas). Of course the underlying theme is System Design Enablement, moving design up to the next level combining chips, packages, boards and software. In fact just last week we announced the capability to design chips in the context of the package and board. See my post Virtuoso System Design Platform for more details. Expert Bar The Expert Bar is back. At any given time, there will be four domain experts on particular areas on duty and you can ask them hard questions. Of course, Cadence has a lot more than four product areas so not all experts are on duty all the time. On the other hand, you don't have to hit a single 90-minute slot—most topics are covered at least twice during the conference. Some specific areas that the expert bar will address that are not narrowly focused on an individual tool are: automotive reliability more than Moore trends in packaging you have 99 problems, FinFET designs won't be one of them verification fabric: plan, coverage and debug advanced methodologies for advanced node custom design Here is the full schedule. No need to pre-register or anything, just come by. Theater The Cadence Theater is once again the place for users to learn from other users, both customers and partners. Plus a few Cadence presenters. I won't reproduce the entire schedule here, but let me whet your appetite by giving a few of the companies who will have people presenting: Samsung ARM GLOBALFOUNDRIES Qualcomm Texas Instruments (TI) Lumerical TSMC Sirius XM TSMC HP Enterprise MIPI Alliance Some of these are obviously semiconductor companies, and some are system companies. And I have no idea what Sirius counts as, nor what they will present. But the clear trend of SDE is that system companies are doing chip design, and semiconductor companies have to deliver reference board designs and software at the very least. Tech Sessions There is a single track of technical sessions on digital, custom/analog, and verification. So if you don't know all about the following, then come along and learn. Oh, and this is not an exhaustive list: Pegasus, the new cloud-ready physical verification system 7nm design How to build ASIL-ready semiconductor designs (ASIL being automotive safety integrity level) Automotive functional safety verification Software development using emulation and FPGA verification RTL signoff with JasperGold formal verification Mixed-signal IoT design Virtuoso System Design (design the chip in the context of the package and board) Check out the detailed schedule . Fireside Chat Each day at 11:30am there is a fireside chat with one of the EDA CEOs. Last year, just before Lip-Bu was due to talk to Ed Sperling, the hall was evacuated due to a fire alarm. Not quite as dramatic as Simon Segars' ARM TechCon keynote a year or two ago, when everyone was evacuated mid-speech due to someone leaving a bagel in a toaster too long. This time it was a floodlight that really did catch fire, so all our moaning about false alarms was wrong for a change. Ed will interview Lip-Bu again this year at 11:30am on Monday on the DAC Pavilion. Let's hope that this time the fireside thing is just a metaphor. In addition to being CEO of Cadence, Lip-Bu is also chairman of Walden International, and with that hat on, he is one of the few VCs interested in chip and hardware companies, so he sees SDE up close. Opening Keynote He doesn't work for Cadence any more, but he was Cadence's CEO for a decade, so we'll include him here as emeritus employee. Joe Costello is giving the opening keynote on Monday morning. He is now the CEO of Enlightened (which you can regard as either a lighting company or an IoT company, depending on how you look at it). His keynote is titled IoT: Tales from the Front Line . Joe is a gifted public speaker, as well as knowing the EDA industry well. Maybe he'll lie down on the stage again to pretend he is a fish. If that doesn't make any sense, then see my post Six Reasons to Go to DAC...Plus One Very Big One , which covers all the DAC keynotes and sky talks, not just Joe's. Cadence Lunches Every day there is a Cadence lunch at noon (until 1:30pm) in ballrooms B/C. The format is that you get to eat while on the podium a panel session of experts from Cadence and their customers discusses the topic of the day (verification, 7nm, or mixed-signal). Monday: It's been taking place for a few years now, so I think we can call this the "annual" Cadence Verification Luncheon. This year, the moderator is Ann Mutschler of SemiEngineering, titled Towards Smarter Verification . The panel itself is Jim Hogan (now a private investor but a long-time Cadence employee, who I worked closely with last time I was here), Christopher Lawless of Intel, David Lacey of Hewlett-Packard Enterprise, and Mike Stellfox, a Cadence Fellow (in Verification, duh). Tuesday's lunch is High-Performance Digital Design at 7nm . I love that "high performance" in the title to distinguish the topic from all the low-performance design at 7nm. The panel is moderated by Jim Hogan (he gets everywhere) and the panel includes ARM, TSMC, Mediatek, Renames, and, of course, Cadence. On Wednesday, it is the turn of Mixed-Signal with Overcoming Mixed-Signal Design and Verification Challenges in Automotive and IoT Systems moderated by Prof. Sayeed Saluhaddin of UC Berkeley. The panel is Pierluigi Daglio of ST, Suresh Jayaraman of Amkor, Goeran Jerke of Bosch, Noam Tuesche of TI, and Vinod Kariat of Cadence. There is such a thing as a free lunch, but only if you register first. Do that on the registration page . The Denali Party Yes, Tuesday night is once again The Denali Party by Cadence . Anyone can attend but you must follow all the steps of the procedure below. Register online Come to the Cadence booth #107 before noon on Tuesday and pick up a wristband Show up after 8pm at Palm Door on 6th with your wristband The bit that people get wrong (I did one year) is that if you do not pick up your wristband on time it will be given to someone else. You will not get in without a wristband. You cannot pick up your wristband at the door. You cannot say I didn't tell you. Cooley's Troublemaker Panel Every year John Cooley runs the Troublemaker Panel with senior representatives from many EDA companies. As usual, Cadence is represented by Anirudh Devgan. The thing that makes this panel interesting (although not as interesting as when Joe Costello and Gerry Hsu were on it together) is that the questions are not softball ones that a safe moderator has come up with. They are submitted anonymously by customers and employees so they are the hard questions that people want to know the answers to (or maybe John makes them all up and then pretends others submitted them for his own safety). Space is limited, so if you want to attend, then here is where you sign up. While you are there, you can also ask your own "edgy" question. The questions will get published in advance (at least they have been in the past). Accellera Tutorial on Portable Stimulus Standard Cadence has been one of the companies instrumental in the creation of the (draft) Accellera Portable Stimulus Standard or PSS. I have to tell you that this is not, despite the name, a standard for portable stimulus. It is actually a portable standard for creating stimulus, in a similar way to Verilog being a standard for creating netlists. It is at a much higher level than UVM ( which is now IEEE standard 1800.2 ), up at buses, and caches, and cameras, and multi-core processors. There will be a tutorial on this at DAC. Cadence's Sharon Rosenberg is one of the presenters. It takes place Monday 1:30pm-3:00pm in room 18CD. The focus of an Accellera tutorial will be on the standard itself. But Cadence does have a product in this space, Perspec System Verifier. This product is right at the heart of the SDE strategy that looks at systems holistically, including software as a first-class citizen. The Conference Schedule There is a complex matrix showing the whole conference schedule. It doesn't go down to the details of what goes on on the Cadence booth (nor any other companies) but it does cover everything on the DAC pavilion, and in other parts of the conference center such as the Cadence lunches.![]()
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