Paul Otellini RIP Paul Otellini was CEO of Intel from 2005-2013. He died in his sleep on October 2, aged 66. Apart from all the good things that happened on his watch, he is probably most famous for "missing mobile." In particular, when Apple and Jobs came to Intel, he didn't believe the sales projections and, as he said in 2013: we ended up not winning it or passing on it, depending on how you want to view it. The world would have been a lot different if we’d done it The sales projections did turn out to be wrong—they underestimated how big iPhone would be. "It's only a handset," the then-CEO of Nokia said. But it wasn't. Arm Datacenters The company that didn't miss mobile is Arm. You can read that story in my posts Happy 25th Birthday, ARM and The Design that Made ARM . (Yes, ARM used to put its name all in uppercase, now it is either all in lowercase (in its logo) or written Arm in text like this.) Intel's stronghold is in the datacenter, of course (and in PCs and Macs). Arm would like to be in those datacenters too, since the mobile market is slowing and there is no room to increase market share— Arm already has pretty much all of it. Simon Segars, Arm CEO, made Arm eat their own dogfood and use Arm processors in at least one of their own datacenters, to find out what all the issues were. Microsoft has made encouraging noises about half their datacenters being Arm powered in the future, but I don't know if they truly have any Arm-based datacenters yet. Of course, when big companies make statements like that, you can never tell if it is dinosaurs fighting, and Microsoft really just wants better pricing from Intel. I always take complaints from big customers about wafer prices with the same grain of salt. Arm is an IP company and so doesn't actually build any processors to power datacenters themselves. The two biggest partners, at least in terms of visibility, are probably Qualcomm and Cavium. The names to remember for their chips are Centriq 2400 for Qualcomm and Thunder X2 for Cavium. Those are both (up to) 48 core 64-bit SoCs, with Qualcomm already on 10nm, and Cavium on 14nm. There was also the Applied Micro X-gene, the future of which seems to be uncertain after the acquisition of Applied Micro by Macom. AMD also got into and then out of making Arm server chips. I certainly expected that whether Arm would be successful in servers or not would be clear by now. For now it is still not even a competition, with Intel having something like 95+% market share and AMD almost all the rest. So I would say the jury is still out. Of course, if Microsoft does use Arm for half its datacenters, I think that would count as a game-changer. Xcelium Simulation on Arm Servers EDA tools are gradually moving into the cloud, at least some of the time. Sometimes this requires a lot of parallelism to be built into the tool as with the Pegasus physical verification system. Other tasks just have a large number of jobs to be run, such as Xcelium simulation used for functional verification. This has both the ability to make use of multiple cores on the same machine, and also the underlying demand of thousands of verification jobs queued up to run at pretty much any time during the chip design cycle. Intel's focus in servers has mostly been on having the highest possible single-thread performance, whereas Arm's licensees have been trying to deliver more cores, that consume less power, in a smaller physical space, for a lower cost. Today Arm and Cadence announced the first SoC verification solution for Arm-based servers. This delivers three main benefits: The first Arm-based server simulation solution for the electronics industry Multi-core speedup reducing long-latency SoC tests Faster overall verification with higher core counts and faster regression, at lower power consumption for IP verification Cadence has been working with both Qualcomm and Cavium on bringing up Xcelium simulation on servers based on their chips. Verification jobs fall, generally, into two classes. The first is short tests (seconds to an hour or so) that are used to verify IP blocks. These tend to run easily on 1 core addressing a fraction of the server memory, which means each core in a server can run one of the jobs and get high throughput. The other class is huge jobs that run for hours to weeks and take most or all of the memory on a server. For these jobs, they either run on a single core and consume the entire memory of the server or, with Xcelium multi-core simulation, the job can be distributed across multiple cores so it runs faster. The arrows on the left point to individual cores for those short jobs and the arrow on the right points to a large bank of cores running together. Xcelium simulation scales up to high core counts, as shown in the above graph (the three different lines are three different designs). Learn More Come by the Cadence booth at Arm TechCon to see a demo of Xcelium simulation running on an Arm-based server. See what Arm describes as: the high-core density of Arm systems delivers significant benefits both in terms of accelerating parallel simulation and reducing the power and floor space required for implementing and validating silicon designs Or the Cadence website has a special page . Sign up for Sunday Brunch, the weekly Breakfast Bytes email.![]()
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