The new release of the Virtuoso platform (ICADVM18.1) offers groundbreaking analysis capabilities and an innovational new simulation-driven layout for more robust and efficient design implementation as well as extending our support for the most advanced process technologies. With this solution, we are able to significantly improve productivity through advanced methodologies and provide the most comprehensive set of solutions in the industry with an interoperable flow across chip, package, module and board. If we told you we are developing a product that would allow you to plan more efficiently at the top level, block level, and at the cell level without having to spend all the time that you might be spending today, does that sound surreal? May be it does sound surreal. But, the fact is that we are soon bringing to you an innovative enhancement in the form of Design Planner that offers pathbreaking design planning capabilities. Design Planner is currently undergoing its final rounds of refinement at the Cadence development center, and it is being well received by our early-access customer partners. The enhancement offers advance methodology for both mature and advance node layout designs, allowing a seamless layout–place–route capability. And when we say we offer a seamless layout–place–route, we mean it. With the integrated Congestion Analysis capability, you can now get real time congestion analysis data to support you in your layout design planning, allowing you to make more informed planning decisions early on in the design life cycle. What is Innovative about Design Planner • Hierarchical schematic-driven layouts that combine the best of top-down and bottom-up design methodologies while avoiding the shortcomings of both • Hierarchical visualization that allows you to easily view or hide details on any level, anywhere in your design, to only view what you need, when you need it • Hierarchical and congestion aware floorplanning and placement that provides automated and assisted productivity • Hierarchical routing and congestion analysis that makes real routing and congestion analysis information available upfront Looks exciting? Watch out for our upcoming Virtuoso platform ICADVM18.1 release. Related Resources Hierarchical Schematic-Driven Layout Methodology The Design Planner Flow For more information on Hierarchical routing and Congestion analysis, stay tuned to our upcoming blog post — Virtuoso: The Next Overture - Congestion Analysis with a New Perspective For more information on Cadence circuit design products and services, visit www.cadence.com . Contact Us For more information on the New Virtuoso Design Platform, or if you have any questions or feedback on the enhancements covered in this blog, please contact team_virtuoso@cadence.com . To receive similar updates about new and exciting capabilities being built into Virtuoso for our upcoming Advanced Nodes and Advanced Methodologies releases, type your email ID in the Subscriptions field at the top of the page and click SUBSCRIBE NOW. Rishu Misri Jaggi and Colin Thomson (Team Virtuoso)![]()
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