When it comes to designing a dense flip-chip die - or even defining a BGA for a complex substrate - the ability to efficiently fan out the pins in the fewest possible layers is paramount. Get this wrong, and you could end up needing additional layers in your package substrate, which will cut into your profits on each and every produced component. It is safe to say that is something that we universally want to avoid! So, how do we go about making sure the escape routing is ideally defined? How do...(read more)![]()
![]()
![]()
↧