For many years, electronic designers have struggled to produce low-power chips and systems with tools and standards that focus on register-transfer level (RTL) hardware. After much talk about taking power optimization to higher levels of abstraction, the IEEE is introducing two new working groups that will help bring low-power design to systems and software developers. The two new IEEE working groups are IEEE P2415 , Standard for Unified Hardware Abstraction and Layer for Energy Proportional Electronic Systems , and IEEE P2416 , Standard for Power Modeling to Enable System Level Analysis. While P2415 will focus primarily on software and firmware development, P2416 will propose a standard that will bring parameterized models to all hardware abstraction levels. A recent IEEE press release describes both groups. "It is exciting to see two new IEEE working groups that will look at low-power design at the system level," said Stan Krolikoski, distinguished engineer at Cadence and chair of the IEEE Design Automation Standards Committee ( DASC ), which is sponsoring both P2415 and P2416. "It is increasingly important to look at electronic design at the system level, both in terms of the higher levels of the hardware design flow plus the software that runs on the hardware." The new working groups are the outcome of a year-long DASC Low Power Study Group led by DASC vice chair Yatin Trivedi (Synopsys). The study group looked at the need for new working groups, how the working groups are related to one another, and how they will relate to the existing IEEE-1801 2013 Unified Power Format (UPF) standard. "I am sure that many of the 30+ attendees to the study group will now participate in the IEEE P2415 and IEEE P2416 working groups to produce solid system-level power standards," Krolikoski said. In my view, the new working groups represent the most significant EDA standards announcements we've seen for some time. Most of today's electronic designs demand power efficiency, but few tools and no standards are available at the systems or software level, where the potential for power savings is the greatest. That means automation is lacking, handoffs between one group of designers to another are ad-hoc and error prone, and devices are not nearly as energy efficient as they could be. What the industry has, at present, are two RTL power intent formats - the Common Power Format (CPF) managed by the Silicon Integration Initiative ( Si2 ), and IEEE-1801 2013 or UPF. Efforts are underway in the IEEE 1801 working group to "converge" the two standards. Any new standard that comes from the P2415 or P2416 working groups will complement and perhaps extend CPF and UPF, or whatever converged intent format arises from these two. Hardware Abstraction Layer The P2415 working group will develop a hardware abstraction layer for "energy proportional" electronic systems. The working group is chaired by Vojin Zivojnovic, CEO of energy design startup Aggios . Zivojnovic talks about "energy" rather than "power." The issue, he said, is optimizing energy consumption. Sometimes designers turn power to the max in order to finish a task quickly and save energy. "Energy proportional," Zivojnovic said, means that a system invests energy only for measurably useful work, which is mostly expressed in software. Apple is the number one company when it comes to energy proportional devices, he said. "Our goal is to automate the energy design and management for devices," he said. "We are trying to formalize and standardize the lowest level of software that needs a formal description of the hardware." That description is essentially the hardware abstraction layer that the P2415 group will develop. It addresses "massive layers of firmware that sit on top of the hardware and to which the OS talks," and thanks to this hardware abstraction, the OS can impact energy consumption by turning clocks on or off, reducing the voltage, or by reducing the clock speed. Zivojnovic said the new working group will primarily focus on software and firmware development. "The goal here is a top-down approach," he said. "We don't start with transistors, we start with what the software needs to know to optimally tune the energy of that device." Something Old, Something New The P2415 working group will start with the " device tree ," which is the way that Linux programmers describe the underlying hardware. A device tree is a tree data structure with nodes that describe the physical devices in a system. The P2415 working group's initial approach is to annotate that tree with energy information. "So we formalize something already established in the software," Zivojnovic observed. CPF and UPF, Zivojnovic said, are structural descriptions of the chip. But these formats don't know about clock trees, which make it possible to turn selected clocks off to reduce the frequency. They don't understand certain sleep states of components. "However, we cannot live without CPF or UPF, because that ultimately guides the design. So our goal is to work closely with IEEE 1801 and suggest certain extensions to UPF that will make it work better with software." The first meeting of the P2415 working group will be held in November. Zivojnovic said he hopes "all the big guys in EDA and IP" will sign up, and that some will contribute technology to the new effort. The working group will aim to produce a first draft standard in 12 months. "The largest opportunity, and also the largest challenge, is to make the EDA community start talking to a different group of people," Zivojnovic said. "In the long term, we'll make this software community become a very important part of what we are doing in EDA." To learn more about the need for hardware abstraction, see the EETimes article by Zivojnovic and investor Jim Hogan, chairman of the board of Aggios, titled " Energy Design Needs Unified Hardware Abstraction ." Parameterized Models While P2415 has its roots in the software world, P2416 is primarily aimed at hardware designers. According to P2416 chair Nagu Dhanwada (right), power tools and methodology architect at the IBM Systems and Technology Group, the intent is to "develop a meta-modeling standard for power consumption modeling of complex IP spanning the entire design stack." To support different levels of abstraction, the models will be parameterized. For example, the models might offer a tiling-based abstraction for use in power grid analysis and a more structural abstraction for use in optimization. P2416 is not starting from scratch. It will leverage high-level modeling work done by the Low Power Coalition (LPC) at Si2, and Dhanwada, in fact, is chair of the Si2 LPC Model Working Group. He said that he expects Si2 will continue to work on modeling in a way that complements the goals of the P2416 working group. Moving up in abstraction is critical, Dhanwada observed, because most of the power savings occurs at higher levels of abstraction. But it's important to support lower levels of abstraction as well, beginning with implementation. The ability to move up and down "will foster interoperability, as the models will be usable at different stages and by different tools in the design flow," he said. While aimed primarily at hardware developers, P2416 will also help the software development process, Dhanwada said. It will allow the software developer to use a virtual model of the hardware that is enabled by a new power modeling standard. "The goal here is to take a syntax-agnostic path, and develop semantic aspects using a generic approach and describe them in a specification language like UML," Dhanwada said. "We would follow it up by proposing extensions to the existing standards [CPF and UPF] in this space." Get Involved! Want to help out? Both the P2415 and P2416 working groups are actively looking for participants. For further information, scroll down to the "Get Involved" notice in the online descriptions of IEEE P2415 and IEEE P2416 . Richard Goering Related Blog Posts Q&A: Qi Wang Updates EDA Power Intent Format Standards Video: What the Newly Approved IEEE 1801-2013 Low Power Format (UPF 2.1 Includes Si2 Conference: New Directions for Low-Power Standards
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