Reflecting on last week at ARM TechCon, together with our close partner ARM, we had a great week for System Design! You can see an overview of all our activities at TechCon 2014 here . First, on Monday, we announced the extension of our partnership to access ARM Technology to optimize our offerings for their products, both the IP as well as ARM's system development tools (like the Fast Models from ARM). Yes, another EDA vendor was announcing related agreements as well, I’ll admit that. The key difference is that the Cadence/ARM agreement is an extension. We had two previous agreements already announced in March ( Cadence Expands ARM-based System Verification Solution, Reducing Time-to-Market for Mobile, Networking and Server Applications ) and May ( Cadence and ARM Expand Collaboration for 64-bit Processor Designs ) this year. Talk about a nice head start! Subsequently we were able already to showcase last Wednesday an overview of our ARM-based offerings. I had published 10 public references of customers that already use our Palladium XP Series offerings in a post on the ARM Community called “ Getting a Glimpse at the Future Early .” Our own Larry Melling presented live on Wednesday our ARM v8 SoC HW/SW Integration & Verification Solution , a comprehensive flow on how to optimize and accelerate hardware and software development and system integration for ARM®-based systems. The overview covered ARMv8 64-bit and v7 32-bit Cortex® based embedded software development with the Palladium® Hybrid solution. We also discussed how you can achieve 10X faster SoC performance analysis and verification of ARM CoreLink IP-based systems with Cadence Interconnect WorkBench and our expanded verification IP portfolio, featuring support for ARM AMBA® 5 CHI for all simulators and Palladium® XP II. Finally we also talked about embedded software debug, a direct result of the long-running partnership we have ongoing with ARM. We further detailed the debug aspects in a TechCon session on Wednesday afternoon in a session called “ Comprehensive HW-SW Debug for ARM Based Designs .” This Session introduced, analyzed and compared the advantages and disadvantages of different HW/SW debug and system debug options users have today. We discussed different options across the main user concerns like speed, accuracy, hardware visibility, software visibility and hardware/software visibility and execution control. On Tuesday we announced a partnership with ARM in the area of the Internet of Things , a hot topic these days. There is a lot to do in the area of technology optimization, as weIl as analog/mixed signal. Regarding system design and verification, I just recently wrote about this area in my Blog “ New Tools Enabling The Internet of Things .” Finally, on Wednesday we announced ARM’s result in using our Palladium XP platform in a release called “ ARM Achieves 50X Faster OS Boot-Up on Mali GPU Development using Cadence Palladium XP Platform with ARM Fast Models .” Again, we have been working on this with ARM for a while and this was a great milestone. Friday, Rob Kaye and I presented these results in an ARM TechCon Session called Reducing Time to Point of Interest with Accelerated OS Boot . We introduced a new metric that is emerging - the "Time to Point of Interest" at which a problem occurs. Billions of cycles of an operating system (OS) have to be executed before software based diagnostics can start, OS boot itself becomes the bottleneck. First and foremost we showed ARM’s results on Palladium XP, combined with actual customer examples how the combination of Fast Models from ARM combined with Palladium XP emulation technology not only can increase productivity for pre-silicon OS bring-up itself, but also accelerates the OS boot itself, allowing to get to points of interest 10x to 100x faster. What a great week for System Design. And a big THANK YOU to ARM for a great partnership! Frank Schirrmeister![]()
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