In early 2014, I had a chance to touch base with Jaswinder Ahuja—Corporate Vice President and Managing Director, Cadence India—who has worked for Cadence since its earliest days in 1988. We talked about IoT, design challenges, and regional opportunities. It was so much fun, I circled back with him in December to check in and see what’s changed. Q: What was the biggest surprise you observed this year? A: I think given the fact that 16nm and 14nm have not yet ramped to volume, one of the surprises was that several companies are already looking at 10nm readiness. And they have plans to do test chips as early as mid-2015. That is one of the top surprises. There are a couple of others, such as some of the early advances in the combination of technologies. So things like tactile sensors, MEMS sensors, immersive interfaces, and robotics are coming together for applications like medicine. Q: What does that mean for Cadence? A: Companies will be doing test and production chips at advanced nodes in 2015. From a Cadence standpoint, our priority is to have the design infrastructure ready in time. We already understand the unique challenges that 10nm represents beyond what we’ve done at 16/14nm and the deep ecosystem partnership necessary to enable those systems. We are already deeply involved. Q: What do you see in your crystal ball for 2015? A: There are three big opportunities going forward in 2015. Because the march of technology is relentless, we’re already talking about the 7nm node. We have to keep moving down that path and help the industry exploit that. On the applications side of things, the IoT is a megatrend. It is, if you think about it, the mother of all trends. It encompasses everything: mobility, wearables, cloud, big-data, analytics, devices, semiconductors. I think that, in itself, further amplifies some of the challenges the industry has seen, especially regarding mixed-signal, low-power, 3D-IC, and SIP (system-in-package). From a broader industry perspective as well as from an EDA perspective, there are looming design challenges that these opportunities will put pressure on. We need to innovate aggressively in the core EDA space because the challenges aren’t letting up. From an industry standpoint, I think we still have not seen a killer app that’s going to drive the industry going forward. Q: You don’t see IoT as a killer app? A: What we see in the IoT space now is that it’s still in the exploration phase. Within IoT, has something really gained momentum to become IoT’s killer app? A killer app is something that scales to a volume, and we haven’t seen that yet in IoT. Q: Have you seen a killer app in health care applications? A: There are a few different segments that I think are more promising than others. Health care is important. Automotive as we broadly call it is another segment; a third segment will be around energy—smart grids, managing energy, alternate sources of energy. We’ll see how things play out there. Q: Where do you see market growth, opportunity, and unique innovation in other regions around the world? A: First of all it’s a target-rich environment with tremendous room for innovation and entrepreneurship. All regions have opportunities to participate. And, given this is virgin territory and there are no leaders in some segments, it’s a unique opportunity for entrepreneurs in various regions because these are big markets. For example, what’s important for IoT is that it’s going to be a cost-per-part segment. There, the thrust will be on frugal innovation. That’s going to be extremely important. Far greater design reuse is required. In developing parts of the world, the applications aren’t yet defined, and there’s no established leadership in this segment. Let me make one more point with respect to regional opportunities, since I’m in India. The big opportunity here will be bootstrapping the ecosystem and getting manufacturing growing. Q: Earlier you mentioned advanced nodes. There’s a bifurcation underway, in which we see significant advanced-node development while at the same time older nodes are taking on new robust life, especially for low-cost applications like IoT. How do we serve those two distinct masters? A: For the first time, we’ve got several nodes. In the past, there was always a trailing node and leading node and a peak node. Now there is no one peak. That will continue going forward if you look ahead. There’s an expectation that 28nm node will be the longest life and highest volume node in the history of the industry. It certainly will be the highest volume node for IoT. It’s a mature node with excellent yields; it can handle analog mixed-signal, digital; it has lots of benefits. The name of the game in 28nm and IoT is rapid turnaround time, keeping your NRE down and tracing a predictable path to getting your design done in shortest possible amount of time. That’s what the industry has to address at 28nm and going forward. These are not going to be massive chips. They are relatively smaller, but they are going to be SoCs in the truest sense of word, with custom logic, mixed signal, and maybe even MEMS. They need to be done cost effectively and rapidly. There will be considerable reuse. For years, we’ve talked about the concept of platforms—large, differentiated platforms in that mega-SoC paradigm that can be retargeted. We’ll see a different incarnation of platform reuse in these more mature nodes for IoT applications. On the other side with more advanced nodes, we still have to grapple with the effects of physics. From a design and manufacturing standpoint, there’s the relentless pursuit to get design infrastructure in shape for that... with design closure, manufacturability, turnaround time, productivity, and so on being big challenges. Q: Talk a little about your views on IP and next-generation SoC design, how vendors can play a more integral role there. A: Whether it’s IoT at 28nm or advanced nodes, one of the needs is a predictable path to rapid turnaround to get to market. That’s extremely important. And third-party IP use in SoCs is now mainstream. For Cadence, we must optimize the tools and IP together so the design company can get what it needs in a single package effectively and they can then add on their differentiation. That becomes a huge advantage for them. This is important at the design and implementation and verification stage—especially at verification stage. Customers spend a lot of time verifying that IP and then integrating it to make the design work. We want to ensure this before we deliver it to the customers. We’re doing that with investments we make in test chips partnering with other ecosystems partners like IP vendors and foundries. Q: What else do you see as significant in our industry today? A: From an India perspective, we have a new government in place that is very proactive and is dedicating itself to developing the electronics industry. Two things are important: the first is Make in India campaign . This is designed to give a boost to manufacturing sector. The next is recognizing that IoT is the wave of the future and helps foster an environment for enabling that. And going forward I think there’s an issue that we’re just beginning to talk about more openly. In segments where there is opportunity for electronics—transportation and health care for example—there is a dimension that’s surfacing: ethical and legal issues. What I mean by that is take for example the automotive space. We talk about self-driving cars, the use of drones to deliver goods. There are these things that are out there—autonomous vehicles—that may be controlled or not controlled by events; things that potentially are a risk to life, that could fall from the sky and hit you on the head. There are ethical and legal issues that I think the industry needs to think through. Q: What were the big milestones you’d attach to Cadence in 2014? A: From an announcements point of view, the acquisition of Jasper was significant. Verification is one of the key design challenges, especially as we look at system design enablement. With formal verification (from Jasper), we have a wealth of formal technology, and it will be integrated into what we have. We can offer a far more compelling solution to our customers’ verification challenges. I would name some other things. From a Cadence innovation perspective and from a product announcement point of view, I’d call out Quantus QRC , Protium , Xtensa dataplane processor advances, each addressing very specific opportunities and challenges. The last item on my list would be the ongoing ecosystem partnerships with foundries and IP providers, including recognition from companies such as TSMC and ARM. These partnerships are key as we continue to construct a system-design enablement ecosystem. Q: Jaswinder, you’re always generous with your time. Thank you! A: Happy to chat, Brian. Here’s to a busy 2015 for us all! Brian Fuller Related stories - Semiconductor Industry Outlook: Enormous Opportunity, Says Jaswinder Ahuja![]()
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