Virtuoso Meets Maxwell: Help With Electromagnetic Analysis - Part I
'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso RF and Virtuoso MultiTech. So, how does Virtuoso meet Maxwell? Now, Virtuoso supports... [[ Click...
View ArticleIC Packagers: Finding Design Issues in SiP - Three Options for DRC Management...
Your design is complete. Yet, you have 20 DRC violations that need to be addressed (whether that means correcting the constraint required value, modifying objects, or waiving the DRC to sign off on......
View ArticleRunning the Software for an Embedded System
A big challenge with developing a modern SoC is developing the software. Not so much the development itself, which is not very different from any other software development, but running and...
View ArticleAn Intuitive Introduction to Finite Element Analysis (FEA) for Electrical...
In this week's Whiteboard Wednesdays video, Tom Hackett begins a 2-part introduction to finite element analysis (FEA) by looking at a simple model of a bridge and showing why FEA techniques are... [[...
View ArticleEmbedded Development: Specialized Processing
Yesterday, in Running the Program for an Embedded System , I wrote about using emulation and FPGA prototyping to test and debug the software load for an SoC. But I didn't discuss where the... [[ Click...
View ArticleTSMC OIP: 6nm and 5nm
Today it is TSMC's Open Innovation Platform Ecosystem Forum, or OIP for short. This is one of two events each year at which TSMC presents much of the status of their technology, their fab... [[ Click...
View ArticleBuilding Neural Networks with High-Level Synthesis
Earlier this week, Dave Apte presented a webinar on AI Accelerator Design with Stratus High-Level Synthesis . It was timed for the East Coast and for Europe, so I had to get up at 6:00am to attend,......
View ArticleVirtuosity: Automated Device Placement and Routing—WSP-based Tree Style...
Those of you who've been following my blog series on the Virtuoso ® Automated Device Placement and Routing solution, perhaps know what is coming next. Yes, we have now reached the last and... [[ Click...
View ArticleBoardSurfers: PCB Electronics - Three Routing Challenges and Their Solutions
In our last few posts, we have explored different aspects of PCB design. Starting with preparing to place components , then placing the components , followed by adding electrical constraints , and......
View ArticleSunday Brunch Video for 29th September 2019
https://youtu.be/w57735WAagg Made at TSMC OIP Symposium (camera Tom Hackett) Monday: CDNLive Israel 2019: Celsius, the Dead Sea, Ramallah Tuesday: Running the Software for an Embedded System... [[...
View ArticleTSMC OIP: Process Status
Last week was TSMC's Open Innovation Platform Innovation Forum (aka OIP). Dave Keller welcomed everyone and then introduced Cliff Hou who gave the update on everything technical. Here's what... [[...
View ArticleThe 2019 Kaufman Award Goes to Mary Jane Irwin
This year's Kaufman Award recipient is Dr. Mary Jane (Janie) Irwin of Pennsylvania State University. Dr. Irwin is the first woman to receive the Kaufman award, EDA's highest honor. As this... [[ Click...
View ArticleIC Packagers: Wrap Your Hands Around a Coil
Coils are a design element that, if not exceedingly common, are showing up in more designs these days. They appear simple at first glance, but keeping a consistent air gap between each revolution of......
View ArticleWhiteboard Wednesdays - An Intuitive Introduction to Finite Element Analysis...
In this week's Whiteboard Wednesdays video, Tom Hackett continues his introduction to finite element analysis (FEA) and the important role it can play in electronics deign. For a detailed... [[ Click...
View ArticleHOT CHIPS: The AWS Nitro Project
In 2016, Amazon acquired the Israeli company Annapurna Labs. Since they were in stealth mode, doing something to do with Arm processors, nobody really knew why. At the time, press reports called...
View ArticleGLOBALFOUNDRIES Technology Conference 2019
This week was the GLOBALFOUNDRIES Technology Conference, GTC 2019, in Santa Clara. It was the 10th anniversary of GF, which was created on 4th March 2009. it is also almost exactly one year since... [[...
View ArticleVirtuoso Video Diary: Multi-Technology Simulation—The Good has Changed for...
If you have multiple circuits designed with different process technologies on a single chip, it seems very likely that you have used our Multi-Technology Simulation (MTS) feature to simulate them.......
View ArticleEDA in the Cloud: Astera Labs, AWS, Arm, and Cadence Report
Earlier this week I wrote a post covering the AWS presentation from HOT CHIPS about the Nitro project. Although the Nitro chips all contain Arm processors, that doesn't make them "Arm... [[ Click on...
View ArticleStudent Story: Min-Chun's Contribution to Cell-Aware Test
Let me introduce myself. My name is Min-Chun Hu, a master student majoring in electrical engineering (EE) at the National Tsing-Hua University (NTHU) in Hsinchu, Taiwan. Currently I am doing a... [[...
View ArticleSunday Brunch Video for 6th October 2019
https://youtu.be/MrWJgYl87pE Made at Sawyer Camp Trail (camera Carey Guo) Monday: TSMC OIP: Process Status Tuesday: The 2019 Kaufman Award Goes to Mary Jane Irwin Wednesday: HOT CHIPS: The AWS Nitro......
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