Breakfast Nibbles: Predictions for 2020...Plus How Did I Do in 2019?
Last year in my post Breakfast Nibbles: Predictions for 2019 , I made various predictions for the year. Let's see how well I did. The predictions were also republished as the last chapter of last... [[...
View ArticleIs Every Day Really Women's Day?
This week had a plethora of posts and articles on International Women's Day (IWD) that is celebrated on Mar 8. In fact, there are two blogs on the Cadence community page – one by Paul McLellan,... [[...
View ArticleAnother Year, Another Book of Breakfast Bytes
There is a new edition of A Year of Breakfasts . Like last year, this is around 30 (out of 250!) of the most popular posts from last year. They are regrouped into various topics, as opposed to being......
View ArticleRAK Attack: Better Driver Tracing, Faster Palladium Build Time, UVM Register...
Looking to learn? There's a bunch of new RAKs (Rapid Adoption Kits) available online now! 1) Indago 19.09 Better Driver Tracing and More Are you new to Indago and not sure where to start?... [[ Click...
View ArticleAnother Year of CadenceLIVE—with Updated Schedule
It's not strictly true that it is another year of CadenceLIVE since we called the event CDNLive in the past. But it's time for my annual preview of the season of CadenceLIVE events around the... [[...
View ArticleVirtuoso Meets Maxwell: Bumps, Bumps.... Where Are My Bumps?
'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso® RF Solution and Virtuoso MultiTech. So, how does Virtuoso meets Maxwell? Now, the... [[ Click on...
View ArticleDigital Full Flow for 5/7nm
One constant in the semiconductor and EDA industries is, of course, Moore's Law. Another is the continual need for improved accuracy and performance. Accuracy is needed to take account of the... [[...
View ArticleNew 3D Analysis Engine Offers Faster, More Accurate Simulations at Lower Cost
A new era is taking shape in the system analysis for highly complex IC, package, and PCB designs with the availability of computers specifically architected to solve problems in complex 3D... [[ Click...
View ArticleVirtuosity: Device Arrays in the Automated Device Placement and Routing Flow
Analog layout automation has been a key area of focus in EDA for the last 20 years. The demand for it has only grown stronger in recent years due to the additional challenges of shrinking process... [[...
View ArticleHow Intel Manufactures Chips
I happened to be looking for something on YouTube recently when I came across this video on Intel's YouTube channel. It's a bit cutesy at the beginning ("Hi, I'm Chip"), but in... [[ Click on the title...
View ArticleIC Packagers: Design Element Label Management
A few weeks ago, we talked about template text labels for design-specific information. There, we were focused on labels that are specific to the design as a whole: revision information, dates,... [[...
View ArticleRSA 2020: From Sulu to Penn & Teller
I attended the RSA Conference in San Francisco recently. I guess that is going to turn out to be the last conference that I attend for some time. All the other events in my plans have either been... [[...
View ArticleBoardSurfers: Creating Footprints Using Templates in Library Creator
One of the difficult steps when designing a printed circuit board is adding components or parts. It is important that you use a correct footprint for your part when designing a PCB. Failing to do so......
View ArticleNetflix and C...adence
Earlier in the week, I wrote about a couple of videos from Intel, about semiconductor manufacturing and the Intel Museum. But with the ongoing rebranding at Cadence, we have a few videos of our own.......
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View ArticleSunday Brunch Video for 22nd March 2020
https://youtu.be/b7ixzahr85s Made on my balcony (camera Carey Guo) Monday: Another Year of CadenceLIVE—with Updated Schedule Tuesday: Digital Full Flow for 5/7nm Wednesday: How Intel Manufactures... [[...
View ArticleTuring Award: Ed Catmull and Pat Hanrahan
Last week, the ACM announced this year's Turing Award would go to Pat Hanrahan and Ed Catmull for their work on computer graphics. The Turing Award is often colloquially regarded as the... [[ Click on...
View ArticleVirtuoso Meets Maxwell: Help with Electromagnetic Analysis - Part V
'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso® RF Solution and Virtuoso MultiTech. So, how does Virtuoso meets Maxwell? Now, the... [[ Click on...
View ArticleLibrary Characterization Tidbits: Validating Libraries Effectively
Hello readers, In this blog, I will brief you about two useful Rapid Adoption Kits (RAKs) for Cadence ® Liberate TM LV Library Validation —a comprehensive library validation solution that is a... [[...
View Article2020 Is the Year of DDR5
I talked recently to Marc Greenberg, one of Cadence's experts on the memory market. Despite the fact that the JEDEC DDR5 standard is still under development, Marc says that: 2020 will be the year... [[...
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