It might seem a bit premature to be talking about IEDM since it isn't until December. But the deadline for submissions has been extended this year to August 10 (so still just a couple of weeks away). Why? As this year's publicity chair, Martin Giles, says: The industry is moving forward at an accelerated pace to match the increasing complexity of today’s world, and a later submission deadline enables us to shorten the time between when results are achieved in the lab and when they are presented at IEDM. In his day job, Martin is an Intel Fellow and director of transistor technology variation in Intel’s Technology and Manufacturing Group. I think that IEDM is one of the best ways of getting a view of the landscape beyond the processes that are currently in volume manufacturing. Since we can almost see the end of scaling silicon transistors, what comes next is not going to be business as usual. In fact, just a couple of days ago, I wrote about the SEMICON West session on Pathfinding Beyond 5nm . This session covered silicon, carbon nanotubes, tunnel FETs, and CoolCube. Beyond 5nm is also one of the topics of the Sunday short courses (with imec's An Steegen presenting at both of them). For sure, I will be there again this year. The 62nd IEDM will be held in San Francisco December 3-7. IEDM has historically alternated between Washington, D.C. and San Francisco, but it now sets down its roots permanently in the Hilton Union Square in San Francisco. Another first this year is that there will be supplier exhibits, as another way to provide attendees with knowledge and information. The deadline for exhibitor signup is November 18. The basic format of IEDM remains unchanged. Tutorials on Saturday. Short courses on Sunday. Plenary session on Monday. Then all those parallel tracks with the really detailed papers. Obviously the detailed program won't be available until the papers have been selected, but the tutorials, short courses, and keynotes are all now set. 90-Minute Tutorials – Saturday, Dec. 3 A program of 90-minute tutorial sessions on emerging technologies will be presented by experts in the fields, bridging the gap between textbook-level knowledge and leading-edge current research. Advance registration is recommended. The Struggle to Keep Scaling BEOL, and What We Can Do Next, Dr. Rod Augur, Distinguished Member of the Technical Staff, GLOBALFOUNDRIES Electronic Circuits and Architectures for Neuromorphic Computing Platforms, Prof. Giacomo Indiveri, Univ. of Zurich and ETH Zurich Physical Characterization of Advanced Devices, Prof. Robert Wallace, Univ. Texas at Dallas Present and Future of FEOL Reliability—from Dielectric Trap Properties to Reliable Circuit Operation, Dr. Ben Kaczer, Principal Scientist, imec Spinelectronics: From Basic Phenomena to Magnetoresistive Memory (MRAM) Applications, Dr. Bernard Dieny, Chief Scientist, Spintec CEA Technologies for IoT and Wearable Applications, Including Advances in Cost-Effective and Reliable Embedded Non-Volatile Memories, Dr. Ali Keshavarzi, Vice President of R&D, Cypress Semiconductor Short Courses – Sunday, Dec. 4 The Short Courses provide the opportunity to learn about important areas and developments, and to benefit from direct contact with world experts. Technology Options at the 5-Nanometer Node , organized by An Steegen and Dan Mocuta of imec, Sr. Vice President of Technology Development/Director of Logic Device and Integration, respectively Design/Technology Enablers for Computing Applications , organized by John Chen, Vice President of Technology and Foundry Management, NVIDIA Plenary Presentations – Monday, Dec. 5 Memory Scaling – Challenges and Opportunities , Seok-Hee Lee, Executive Vice President and Head of DRAM Product and Technology, Hynix Brain-Inspired Computing , Dharmendra S. Modha, IBM Fellow and Chief Scientist for Brain-Inspired Computing, IBM Differentiating Technologies and Novel Opportunities for the Future Internet of Everything: the Quest for Power Efficiency , Marie-Noëlle Semeria, CEO, Leti Evening Panel Session – Tuesday evening, Dec. 6 The IEDM offers attendees two evening sessions where experts give their views on important industry topics. Audience participation is encouraged to foster an open and vigorous exchange of ideas. How Will the Semiconductor Industry Change to Enable 50 Billion Connected Devices? Moderator: Prof. Aaron Thean, University of Singapore Challenges and Opportunities for Neuromorphic and Machine Learning , Moderator: Marc Duranton, Sr. Member of the Embedded Computing Lab, CEA There will also be special focus sessions during the week on: Wearable electronics and IoT Quantum computing System-level impact of power devices Ultra-high-speed electronics More information is on the IEDM website . Next: Nokia's Rise and Fall...and Maybe Rise Again Previous: Gimme a G...Gimme a 3...Whatcha Got?...DSP![]()
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