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What's for Breakfast? August 15th
It's verification week this week, with 5 posts about various aspects of Cadence's portfolio of verification tools. (Please visit the site to view this video) Monday: At CDNLive in Bengaluru, Michal...
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DAC 2016: 5 Ways to Boost Your Productivity Designing Custom with Advanced Nodes
It’s a huge conundrum: as process nodes shrink, design times grow longer, while project schedules remain the same or get reduced. Growing the design team isn’t always an option. “There are not enough...
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Gimme a G...Gimme a 3...Whatcha Got?...DSP
Today at the Linley Mobile and Wearables Conference in Santa Clara, Cadence is announcing the latest Tensilica DSP. The Tensilica ® Fusion G3 is a multi-purpose low-power DSP targeted at mobile and...
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IEDM, New This Year
It might seem a bit premature to be talking about IEDM since it isn't until December. But the deadline for submissions has been extended this year to August 10 (so still just a couple of weeks away)....
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CDNLive Boston Preview
The full agenda for CDNLive Boston is now available. This is really "East Coast" CDNLive since it is the only CDNLive in the US outside of Silicon Valley. I've not been before, but I understand that...
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Verification Technology Update
At CDNLive in Bengaluru last week, Michal Siwiński gave a technology update on verification to everyone. Well, the PCB folks had already gone off to another room for their own update. The first thing...
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DAC 2016: How the RocketSim Parallel Simulation Engine Eliminates Functional...
At the Design Automation Conference in June, I stopped by Cadence’s booth for a demo of our RocketSim parallel simulation engine. (Cadence acquired Rocketick, who developed the tool, back in April.)...
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What's for Breakfast? August 8th
This is the first weekly video "What's for Breakfast?" that previews the blog entries coming up the following week on Breakfast Bytes. (Please visit the site to view this video) Monday: RISC-V and...
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What's for Breakfast? August 8th
This is the first weekly video "What's for Breakfast?" that previews the blog entries coming up the following week on Breakfast Bytes. (Please visit the site to view this video) Monday: RISC-V and...
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What's for Breakfast? August 15th
It's verification week this week, with 5 posts about various aspects of Cadence's portfolio of verification tools. (Please visit the site to view this video) Monday: At CDNLive in Bengaluru, Michal...
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Building the Cars of the Future
The big buzz in the automotive industry lately is autonomous driving vehicles. Companies like Mercedes, BMW, Google, and Tesla have already released, or are soon to release, self-driving features that...
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What’s New with Hybrid Memory Cube (HMC)
Hybrid Memory Cube (HMC) is a memory architecture that was developed by Micron in 2011. It was developed in response to the high-bandwidth, high-efficiency memory requirements of multi-core processing...
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A Perspective on Perspec
Today we have UVM, the universal verification methodology. This is great for verifying IP blocks. But when it comes to verifying at the system level, something higher level is required, something that...
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10 New Protocols to Design and Integrate Your SoC in Record Time
This month we released 10 new Verification IP for leading-edge protocols! Did I say 10? Yet again, we continue to be first in the market with support for protocols used in leading-edge applications...
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Whiteboard Wednesdays - Tensilica Fusion G3 DSP Features and Benefits
In this week's Whiteboard Wednesdays video, Paul Garden provides more details on the new Tensilica Fusion G3 DSP features. He’ll discuss the benefits of the 128-bit SIMD ALU, instruction formats,...
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Omnia Simulation in Tres Partes Divisa Est
"Omnia Gallia in tres partes divisa est" were the opening words to Julius Caesar's account of the Gallic war. All Gaul is divided into three parts. He went on to explain that they were the Belgians in...
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High-Sigma Showdown: Which Method is Better?
The adoption and usage of advanced node technology (16nm and below) has been extraordinary over the last few years. However, along with the benefits in power and area, the new nodes also contain new...
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CDNLive Bengaluru, a Long Journey
I've not been to Bengaluru for about 20 years, when I ran engineering at Compass and we were considering setting up an engineering group in India. I came out with an Indian business development guy and...
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Whiteboard Wednesdays—Radar Signal Processing for Automotive Applications
In this week's Whiteboard Wednesdays video, the first of a two-part series, Pushkar Patwardhan provides an overview of radar systems in automotive applications and the different data streams that must...
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CDNLive Bengaluru: Day 2
CDNLive Bengaluru takes place over two days. But it is organized very differently from the two-day CDNLive Silicon Valley. The first day is dedicated to verification, the second day to implementation,...
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