As the stakes for winning server segment market share grow ever higher an increasing number of companies are seeking to grasp the latest Holy Grail of multi-chip coherence. The approach promises to better enable applications such as machine learning, network processing, in-memory data base, and other large dataset tasks. Arm and its partners continue to pursue the server market long dominated by Intel. The results will be SoCs that combine Arm CPU sub-systems with high speed interfaces such as PCI Express 4, presenting a myriad of challenges blending the architectures of Arm and Intel. Arm and Cadence have collaborated to create a reference design, addressing the challenges and capturing the information to share with the industry and improve productivity for creating and verifying these complex systems. Figure 1: Modern Server Farm Arm’s server strategy has been in place for a long time, initially as low power alternatives to Intel chips built by companies such as Calxeda. Then Arm shifted into high gear when they announced the v8 architecture in late 2011 . Lower power consumption of the Arm architecture continues to be an advantage that server customers and providers seek with Arm cores, and performance is the primary benchmark. As the PC market declines, Intel has increased its reliance on the server market to generate revenues. And competitors such as Marvell and Cavium are increasing market pressure with their latest Arm chips . Xilinx, Arm, Cadence, and TSMC recently announced a collaboration to create demonstration silicon for the CCIX interface and ARM’s server architecture. Cadence provided interface controller and PHY IP, design and verification tools, and expertise to deploy the most optimal application methodologies. One of the challenges faced by the design team is integrating PCI Express, a PC standard, into the ARM SoC architecture. Figure 2: Cadence PCI Express 4.0 IP demonstration board In a blog on the ARM Community titled PC meets Arm: Integrating PCIExpress into the Arm Server Architecture , author Nick Heaton describes some of those challenges and the application of Perspec System Verifier to properly verify the system using Portable Stimulus. Learn about more of the challenges and verification solutions at this year’s ARM Techcon . In a presentation titled “PC Meets Arm: Integrating PCIe Gen4 Root Complex IP Into an Arm-Based Server SoC” , you’ll have the opportunity to hear directly from Arm and Cadence leaders on the project. Authors Nick Heaton | Distinguished Engineer, Systems Solutions, Cadence Sujil Kottekkat | Principal Engineer, Arm Abstract With the advent of IP supporting the SMMUv3 specification from Arm, the enhanced capabilities of the fourth generation of the PCI Express standard can be realized in Arm SoCs. Many challenges face integrators working at this frontier where Arm meets the Intel world and this paper outlines new techniques and technologies designed to make these challenges manageable.![]()
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