I already gave an introduction to my first visit to imec in my life in my post If It's Tuesday This Must Be Belgium. My First Visit to imec One of the things I mentioned there is that they have an EUV stepper in their fab, and they work closely with ASML, the only company that manufactures EUV steppers. They are in Veldhoven in the Netherlands, which Google maps tells me is about a one-hour drive from imec in Leuven. As I wrote in my second post about that day Imec Roadmap , the general roadmap is to first produce 7nm with multiple patterning, and then produce a more optimized 7nm process introducing EUV. For 5nm (and below), EUV is assumed. So EUV is really important to continue scaling processes. If you are not interested in lithography, then this post will probably tell you way too much. It affects manufacturers a lot, but designs and EDA not much. Kurt Ronse gave me the imec view on EUV readiness. Introduction to EUV You can skip this if you already know plenty about EUV. First, it stands for Extreme Ultra Violet, light of 13.5nm. For a long time we have been using 193nm light with immersion lithography. Even with aggressive DFM on the masks, the pitch limit achievable is 80nm. So below that limit, we need to use multiple patterning. The EUV light is generated by an almost unbelievable system with a droplet generator that generates tin droplets, something like 50,000 per second. Each one is hit with one laser to shape the drop, and then a really powerful laser that generates the light. Of course, that goes in all directions, and a big mirror called the collector focuses some of the light. That brings us to the next problem, that almost everything absorbs EUV, in particular lenses. So all the optics, including the mask, has to be reflective. But even normal mirrors absorb EUV so these are actually multi-layer mirrors consisting of many layers of silicon and molybdenum built up. They still only reflect about 70% of the light, so with 8 or more mirrors in the optical path, most of the energy of the EUV light is absorbed by the mirrors (causing heat distortion) with very little reaching the photoresist on the wafer. Next problem, even air absorbs EUV, so the whole system has to run in a vacuum. Actually, there is apparently a little hydrogen let in there since that helps keep the system clean, but causes problems for some materials you might want to use. This means that a very sensitive photoresist needs to be used, otherwise the whole machine runs too slowly for volume manufacturing. But that has its own issues. Current Status The big issues with EUV that I already knew about before visiting imec were: Light source power, and resist photosensitivity. Received wisdom is that 250W is needed for volume manufacturing Up time and reliability. Obviously, if the machine is not up most of the time, it reduces throughput Mask defects. The multi-layer nature of the masks makes it hard to build a mask without defects that will print Pellicle. If contamination ends up on the mask (mirror) then it will print, so a pellicle is needed to keep contamination out of the optical plane. But almost everything absorbs EUV so not a lot of materials are available—and to make it worse, with reflective optics the light path goes through the pellicle twice For years the EUVL symposium steering committee has tracked a consensus as to which EUV challenges were the biggest. The above graph shows that for the first time power is not the top concern. In fact ASML have demonstrated 250W power for two months, and so this seems to be less of a problem. When power was under 100W, it was a show-stopper and nothing else really mattered. The new #1 criterion is the resist. There were two problems with potential resists. The first was lack of sensitivity, that it took too much light to print. The second was line-edge-roughness (LER) which is what it sounds like. The two tradeoff against each other since you can reduce LER with a less sensitive photoresist, but then it takes more time to print. The recent shift at imec (and foundries) from infrastructure readiness to yield means that LER has been replaced with "stochastic failures" (meaning randomness) and sensitivity has been reduced in priority. An availability problem I learned about is that the droplet generator has historically had to run continuously (even if the stepper wasn't being used) because it can't be easily restarted, It also took days to refill the tin and get it running again. So being able to refill the tin without stopping, and having automatic start to allow other maintenance (such as replacing the collector) is important. But this is apparently on-track. The mask defect problem is going to be a big issue but in the initial introduction of EUV will be less of an issue since it will mostly be used for contact and cut masks. Since these are mostly blank with relatively few polygons, defects can be hidden. If the defects can be got down to less than 10 per mask then pattern shift might work. Currently, yields of usable masks with low-enough defect counts is an issue but should "just" be engineering. The pellicle material being used currently is polysilicon, but there still seem to be some issues with transmissivity. One is when it is in use, but a second issue is the requirement to inspect the mask through the pellicle, since otherwise removing and replacing the pellicle could introduce defects following a clean inspection. Work is going on to develop carbon nanotube (CNT) pellicles for higher power and for resistance to the trce hydrogen that is required in the vacuum. Stochastic Failures The new #1 problem is stochastic failures. As Kurt presented: At highest resolution and low dose, stochastic defects (nanobridges, broken lines, closed contacts, touching contacts) are dominating The solution is: Stochastic defect avoiding by co-optimization of fundamental understanding of EUV materials, track and stack, metrology and inspection, scanner, masks and computational litho, alternative processes and electrical performance, with a target of defect-free patterns. This is still a big challenge, and an area where imec is working. The problem is that often, as you turn a knob to tune some aspect of the system, you end up with a very narrow window. Set the parameter too low, and you get missing contacts. Too high and you get "kissing contacts." For most things in life, 1 part per billions is so close to zero as to be almost the same. But when your chip has literally trillions of polygons then even a good window of a lot of standard deviations (like 6 sigma) is nowhere near good enough. I won't attempt to go into the details of imec's work since this post is already too long, and I'm not a lithographer so don't have detailed knowledge about chemically amplified resist, or metal containing resist. At least not enough to say anything intelligent. Optimism I used to be a pessimist about EUV a couple of years ago. For example, see an old SemiWiki post from SEMICON five years ago, which concluded: My opinion. I still don't see how everything can be made to work in time. Intel is already planning 10nm without it. The pellicle issue I have always considered a killer but perhaps a silicon pellicle can be made to work. This meeting was the first time I'd heard the hint of the possibility of an EUV-transparent pellicle. The fact that masks will not be defect free seems like a big issue. So much is being invested in the light source that I can believe that will be solved. But the almost laser-like focus (see what I did there) on that one issue has obscured many other issues that stand between EUV and use in high volume production lithography. Then I got to EUV Might Really Happen . Many of the problems seem to be on track to be solved, and are engineering rather than science. All the foundries have gone on the record as saying that they are confident EUV will be ready for HVM, and they are working furiously on all the remaining issues, especially the ones related to practically running an EUV high-volume lithography line (imec's fab is a research fab, and they don't have the wafer handling associated with high volume, so they can't really contribute there). Sign up for Sunday Brunch, the weekly Breakfast Bytes email.![]()
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