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Cadence at ARM TechCon – Verification IP, 28nm Digital, Low Power, Mixed Signal, and More

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With nine technical paper presentations, two sponsored sessions, demos, and exhibits, Cadence will have a strong presence at ARM TechCon in Santa Clara, California Oct. 30-Nov. 1, 2012. Cadence papers and sessions will cover topics including advanced-node digital, mixed-signal, low power, verification IP (VIP), and embedded software development with virtual prototyping.

ARM TechCon is actually two conferences in one - a Chip Design Conference Tuesday Oct. 30, and a System and Software Design Conference Oct. 31 and Nov. 1. Here's what you can expect from Cadence during each of these conferences.

Chip Design Conference - Oct. 30, 2012

Exhibit: At Cadence booth #36, you can learn about an RTL-to-GDSII flow for ARM Cortex-A processors. Cadence will also demonstrate a mixed-signal solution for ARM Cortex-M0 based designs (for more information on this solution, see this recent ARM blog post).

Sponsored Session:  In room #204, Cadence will present a full day of presentations, demonstrations, and customer experiences with Cadence technologies for implementing ARM Cortex-based devices.

Technical Papers (click on links for details):

ATC-101 Tues @ 10:30am
Silicon Validation of GLOBALFOUNDRIES-Cadence Digital Design Flow in 28nm using ARM Physical IP

ATC-103 Tues @ 10:30am
Advantages of NVMe for Low-Power Storage
Bob Pierce

ATC-106 Tues @ 11:30am
Building Your UVM Environment for ACE-Based Verification
Mirit Fromovich, Tamar Meshulum

ATC-112 Tues @ 2:10pm
A Novel Power Intent Specification Methodology for the IP Developer
John Decker

ATC-110 Tues @ 2:10pm
Cache-Coherent Interconnect Complexity, Verification, and Performance Analysis
Nick Heaton, Stewart Penman, Paul Martin (ARM)

ATC-117 Tues @ 3:10pm
Improving Performance, Power, and Area of a High-Speed Dual-Core ARM Cortex-A9‒Based SoC with Clock Concurrent Optimization Technology
Koen Lampaert (Broadcom), Jason Corbisiero

ATC-123 Tues @ 4:10pm
PCIe Gen 3 Implementation on AXI
Raju Pudota

System and Software Design Conference  -- Oct. 31 and Nov. 1, 2012

Exhibit: Cadence booth for these two days is #417. Demonstrations will include the System Development Suite and power-aware signal integrity analysis.

Sponsored Session:  In room #212 Wednesday, Oct. 31, from 11:30 am - 12:30 pm, Cadence will offer a session titled "Prototyping and Early Software Development for ARM-Based Embedded Systems."

Technical Papers:

ATC-218 Wed @ 2:30pm
Improving the Speed and Debug Ability of the Emulation/Prototyping Phase of ARM SoC Development
Leonard Drucker

ATC-303 Thurs @ 10:30am 
Analysis of Software-Driven Power-Management Policies using Functional Virtual Platforms
Michele Petracca

For more information about Cadence at ARM TechCon, click here. For the ARM TechCon web site and registration information, click here.

Richard Goering

 

 


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