Virtuosity: 先端ノード用デバイスレベル配線 ‐ Generate Trunksの使用
このVirtuoso®デバイスレベル配線のブログシリーズの2回目以降では、トランク（幹線）とツイッグ（枝配線）がどのようにツリー構造を構築するかについて説明します。今回は、カスタマイズしたデバイスレベル配線を実現ための骨子となる、Trunk Generation機能の詳細を説明します。... [[ Click on the title to access the full blog on the...
View ArticleSolving RFIC and RF Module Design Issues
When creating new RFIC modules, designers typically need an array of tools and applications from various vendors to complete the design process. In 2018, Cadence launched the Virtuoso® RF... [[ Click...
View ArticleSunday Brunch Video for 7th June 2020
www.youtube.com/watch Made on my balcony (camera Carey Guo) Monday: The Five Waves: AI, 5G, Cars, Clouds, IoT Tuesday: TSMC: N7, N6, N5 Wednesday: Artificial Intelligence...and Artificial...
View ArticleETS2020: Functional Safety
One of the keynotes for the European Test Symposium 2020 (ETS2020) was by Cadence's Alessandra Nardi. As you might guess from her name, she's Italian. But I think that's about as European... [[ Click...
View ArticleBoardSurfers: 正しさのその先へ – デザイン／配線の改善と最適化
PCBレイアウトエディタは、設計が正しいことを確認するために、コンストレイント ( 制約条件 ) とルールという形式を通じて、多くのチェックを提供します。 DFM ルールを利用することで、ファブリケーションやマニュファクチャリングの問題も回避できます。さらに、自動配線を使用すれば、正しい接続とトレースを備えたエラーのないボードを確実に設計することができます。... [[ Click on the...
View ArticleVirtuosity: デバイスの配置とルーティングの自動化-グリッド生成
Virtuoso®自動デバイスレベル配置およびルーティングシリーズの次の投稿です。 最初の投稿では、自動化されたデバイスレベルの配置およびルーティングソリューションの必要性について話しました。 2回目の投稿では、アナログデザインでの非常に重要な手順、「配置と配線のデバイスグループとトポロジの特定」を強調しました。... [[ Click on the title to access the full...
View ArticleVirtuosity: 先端ノード用デバイスレベル配線-Trunk-to-Trunk Mesh配線
トランク（幹線）生成の次のステップは、トランクの相互接続（幹線間接続）です。Virtuoso®デバイスレベル配線のブログシリーズのこのブログでは、新しいTrunk-to-Trunk Mesh配線機能を使ってトランク接続を作成し、EM違反を防ぐ方法について説明します。 Trunk-to-Trunk... [[ Click on the title to access the full blog on...
View ArticleVirtuosity: The Latest Virtuoso ADE Usability Enhancements
We live in a world where the idea of usability is to make products easy to use, make things easily accessible, and visually appealing. It's our constant endeavor to improve the usability of our... [[...
View ArticleVirtuoso Meets Maxwell: Finite Element Can Add Clarity
'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso RF Solution and Virtuoso MultiTech. So, how does Virtuoso meets Maxwell? Now, the... [[ Click on...
View ArticleTake a Cadence Masterclass and Get a Badge
Many of us are locked down, working from home, or at the very least not going to go and sit in a lecture room all day. Not least because that option is probably not available. But one thing you read......
View ArticleSophie Wilson: The 2020 Wheeler Lecture (The 6502 to Multicore)
Since I was an undergraduate studying computer science at what was then called the Cambridge Computer Laboratory, I am on their mailing list. Each year, I get invited to the Wheeler Lecture. But it......
View ArticleVirtuosity: Voltus-Fi-XL FAQ — Your Questions, Our Answers
Hello, dear readers! If you are looking for some distilled knowledge about Voltus-Fi, you have dropped by the right page! Over the years, you have stayed curious and asked our experts many questions......
View ArticleIC Packagers: Welcome to the Dark Side
The 7 th ISR ( HotFix 007 ) for the 17.4 release is available for download now. This marks the first major update for the 17.4 software stream, and what an update it is! You’ll notice many new...
View ArticleCome Join Us for a SystemVerilog Real Number Modeling Seminar!
Looking to improve your SystemVerilog? On June 17th, 2020, there’s a webinar going on at 9:00 CEST that can help you out. Come join us for our SystemVerilog Real Number Modeling seminar! You’ve been......
View ArticleSophie Wilson: The 2020 Wheeler Lecture (Multicore to Today)
This is the second post continuing from yesterday's post Sophie Wilson: The 2020 Wheeler Lecture (The 6502 to Multicore) covering Sophie Wilson's Wheeler Lecture from Cambridge in the middle... [[...
View ArticleLibrary Characterization Tidbits: Understanding the Liberate AMS Command-Line...
Hello Readers, Characterizing mixed-signal macros to create instance-specific models for timing, power, and noise can be a challenging task. The Cadence characterization portfolio offers Liberate...
View ArticleCadence OrCAD and Allegro 17.4-2019 HotFix 007 Is Now Available
The HotFix 007 (QIR 1) update for OrCAD® and Allegro® is now available at Cadence Downloads . The new release includes many improved product features and enhancements, mostly resulting from... [[ Click...
View ArticleCustom Instructions in Tensilica: Wearing a TIE Makes You Smarter
Tensilica has a number of different product families targeted at different applications from audio, via video, to deep learning. I've written posts about all of these during the last year. The... [[...
View ArticleMy Life at Cadence Video Series: Chaitra Dustker
Cadence recently interviewed five of our amazing women engineers for a new video series titled “My Life at Cadence”! This second video features Chaitra Dustker, lead applications engineer, Digital......
View ArticleMy Life at Cadence Video Series: Chaitra Dustker
Cadence recently interviewed five of our amazing women engineers for a new video series titled “My Life at Cadence”! This second video features Chaitra Dustker, lead applications engineer, Digital......
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