Sunday Brunch Video for 14th June 2020
www.youtube.com/watch Made in Hakone Japanese Garden, Saratoga (camera Carey Guo) Monday: ETS2020: Functional Safety Tuesday: Take a Cadence Masterclass and Get a Badge Wednesday: Sophie Wilson: The......
View ArticleIEEE 1838: Taking Test into the Third Dimension
I've written quite a bit recently about advanced packaging and More than Moore technologies for building systems. For example, see my posts: John Park's Webinar on Chiplets Known Good Die... [[ Click...
View ArticleTraining Insights - Comprehensive RTL Signoff Using JasperGold Superlint App
Most have heard the phrase "time is money". Thinking more about it, probably the right phrase would be "time is more valuable than money". People look at their bank accounts with... [[ Click on the...
View ArticleUncanny Valley: Being Human in the Age of AI
Today's post is somewhat off-topic, despite having AI in the title. Uncanny Valley: Being Human in the Age of AI is the name of an exhibition at the de Young Museum in Golden Gate Park in San... [[...
View ArticleStart Your Engines: AMSD Flex—Take your Pick! – AMSD Flexモードの紹介
Cadence ® Spectre ® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により、ミックスシグナル・デザイン検証を「活性化」し、市場競争でチェッカーフラッグを受けることができます。Start Your... [[ Click on the title to access...
View ArticleBoardSurfers: Training Insights: Creating High-Speed Via Structures
“Every once in a while, a new technology, and old problem, and a big idea turn into an innovation”, said Dean Kamen, and indeed making electrical connections in a multi-layered PCB was no less than......
View ArticleIC Packagers: Navigating Your Visible Design
Last week we introduced you to the new dark theme . But, we listen to your suggestions for ideas of other ways to improve your ability to move around your design efficiently. That brings me to two......
View ArticleFully Homomorphic Encryption
Do you know what Fully Homomorphic Encryption (FHE) is? When I first heard about it a few years ago, I thought it was something of minor academic interest, like those schemes for giving keys to a... [[...
View ArticleOn Writing
Tomorrow is Juneteenth, which commemorates the ending of slavery in the United States . It is a Cadence holiday. Breakfast Bytes will not appear. Today's off-topic post is about how I became a... [[...
View ArticleStart Your Engines: Using CLIPS to Generate Portable Virtuoso IP for SoC...
Cadence ® Spectre ® AMS Designer is a high-performance mixed-signal simulation system. The ability to use multiple engines, and drive from a variety of platforms enables you to "rev... [[ Click on the...
View ArticleDigital Design and Signoff Training Deep Dive: Part 2 – Implementation
Welcome back to our series, and if you’re new here, thanks for joining us today! We’re going to be looking at another part of Digital Design and Signoff solutions: Implementation. We’ll be building......
View ArticleMake a DATE for the Alps Next Ski Season
It's the Summer Solstice. To be precise, that was on Saturday, the longest day of the year, but Breakfast Bytes doesn't appear at weekends. Surprisingly, the earliest sunrise of the year was... [[...
View ArticleVirtuoso Meets Maxwell: Full CellView EM Extraction
'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso RF Solution and Virtuoso MultiTech. So, how does Virtuoso meets Maxwell? Now, the... [[ Click on...
View ArticleSunday Brunch Video for 21st June 2020
www.youtube.com/watch Made in "cherry blossoms" (camera Carey Guo) Monday: IEEE 1838: Taking Test into the Third Dimension Tuesday: Uncanny Valley: Being Human in the Age of AI Wednesday:... [[ Click...
View ArticlevManager: One Manager to Rule Them All
Here's a high-level view of verification: If everyone properly plans their verification project, why do quality problems and schedule slips persist? It really comes down to the adage “Begin with... [[...
View ArticleComputational Digital Software
Cadence has been using the term "computational software" to unify many of the algorithms that underlie EDA tools. I think that the area where this is clearest is the digital full flow,... [[ Click on...
View ArticleIC Packagers: How to Fix Padstacks that Aren’t Showing All Their Layers
We talked a few months ago regarding why flip-chip padstacks are single layer pads in your design. Today, I wanted to spend just a few minutes looking at a variation on this issue that has come... [[...
View ArticleUnder the Hood of Genus
From time to time people ask how EDA tools work under the hood. I think the question is more along the lines of "what is all that stuff in the front of my car?" more than "how does... [[ Click on the...
View ArticleStart Your Engines: AMSD Flex – 最新のSpectreの機能にすぐにアクセスできます！
Cadence ® Spectre ® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により、ミックスシグナル・デザイン検証を「活性化」し、市場競争でチェッカーフラッグを受けることができます。Start Your... [[ Click on the title to access...
View ArticleDigital Design and Signoff Training Deep Dive: Part 3 – Silicon and Signoff
We’re excited to share the last blog for the Digital Design and Signoff Training Deep Dive. We’ve shared the courses you need to take for Synthesis and Test , and Implementation , now we’re going to......
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