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Whiteboard Wednesdays—New LPDDR4 Standard Features
In this week's Whiteboard Wednesdays video, the first of a two-part series, Jeffrey Chung discusses new LPDDR4 standard features that reduce power consumption and increase performance. Low-voltage...
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Front-End Summit: Avoiding Routing Congestion with High-Level Synthesis
In the past few years, high-level synthesis (HLS) from SystemC has become a mainstream EDA product with high quality of results. But there are still a few issues to be resolved, one of which is the...
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Lazy Test Cases for Tool Failures Using the Testcase Optimizer (TCO)
The Current State It seems to be a fact of life that software has bugs and, unfortunately, our software is no exception. In most cases, however, it is not the bug itself that causes you grief. Rather,...
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Pretty Fly For an Old Feature—Discovering Existing But Unknown Incisive...
It is the year 2014. We live in a highly mobile, wireless world, supported by cloud and associated network infrastructure. Therefore, the use of physical media, such as CDs, DVDs, BlueRay discs, and so...
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Cadence at CES 2015: A Look at Face-Detection Technology
LAS VEGAS—A key function of automotive, IoT, security, and similar applications is the ability to detect faces and take action. But it's got to be done in an efficient, power-sensitive manner. Here at...
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Satisfy Your Need for Verification Speed—How to Run Your UVM Cowbell on...
If you have been living in the US for the last few years (if not, I have a treat for you) and have paid any attention to TV ads, you've probably seen the AT&T Bigger is Better commercials, where an...
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Lazy Test Cases for Tool Failures Using the Testcase Optimizer (TCO)
The Current State It seems to be a fact of life that software has bugs and, unfortunately, our software is no exception. In most cases, however, it is not the bug itself that causes you grief. Rather,...
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Low-Power Summit Presentation: Why Cadence Has “Passion” for Power
Cadence offers extremely broad low-power technology that impacts many tools and flows for IC and systems design, according to Paul Cunningham (right), vice-president of R&D for front-end design at...
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It’s a Kind of Magic: How Calculated Messages Can Make You a Hero, and There...
At the risk of dating myself—oops, it is too late, I already did so last August while talking about display density innovation —I will use a metaphor from a nineteen eighties movie to illustrate the...
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Cadence at CES 2015: Power-Sensitive Always-On Systems
LAS VEGAS—As the mobile world matures, opportunities abound for optimizing the user experience. For instance, voice commands now trigger a variety of functions and applications (think Siri and "Ok...
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Whiteboard Wednesdays—Lower BOM Cost, Use 32-bit Wide LPDDR4 in Consumer...
In this week's Whiteboard Wednesdays video, the second of a two-part series, Jeffrey Chung discusses 32-bit applications and how LPDDR4 can be used most effectively.(Please visit the site to view this...
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Searching Through a Complex Design? DFS to the Rescue!
Recently, while at a customer site, I was faced with the huge task of looking for all instances of a specific module to find a particular signal assignment. My first thought was to do a grep search,...
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Dealing with the "Throw it Over the Wall" Methodology in Power Supply Network...
"Throw it over the wall" is business slang for completing your part of a project and then passing it off to the next group. This phrase is usually said when there is little communication between two...
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Pretty Fly For an Old Feature—Discovering Existing But Unknown Incisive...
It is the year 2014. We live in a highly mobile, wireless world, supported by cloud and associated network infrastructure. Therefore, the use of physical media, such as CDs, DVDs, BlueRay discs, and so...
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DVCon 2015—“Hot Topics” for Design and Verification Engineers
DVCon, the premier conference for IC design and verification engineers, runs March 2 to 5, 2015 in San Jose, California. This year’s conference focuses on “hot topics” that are critical to attendees,...
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Get a Glimpse at New Ethernet Standards in the Works
I attended the IEEE 802.3 meeting in Atlanta last week. I have blogged about Ethernet standards-making meetings before and I thought I should post an update on how things have progressed. Cadence has a...
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Front-End Design Summit: How to Get the Best Results from Physical Synthesis
Physical synthesis with Cadence Encounter RTL Compiler Advanced Physical Option can greatly reduce power and area while improving frequency – but you need to follow the right methodology for the best...
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Cadence Firmware Packages Enable Successful IP Integration
Building a system on chip (SoC) from IP blocks requires system-level integration and bring-up, and that requires firmware working on the target. In a fast-paced development cycle, it is crucial to...
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Whiteboard Wednesdays - Benefits of Voltage and Monitoring IP
In this week's Whiteboard Wednesdays, Bob Salem discusses voltage and monitoring intellectual property (IP). Using voltage and monitoring IP to accurately track temperature and turn off hot points can...
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Cadence at CES 2015: Enabling Surreal Surround Sound Audio
LAS VEGAS—In the cacophony of CES, it’s refreshing to find an escape. I found mine in a set of headphones slipped over my ears. Standing in the Cadence booth chatting with Yipeng Liu, with Cadence...
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