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Happy Birthday, HP 12c—35 Years and Counting
Last year was the 50th anniversary of Moore's Law. One consequence of Moore's Law has been that computers got significantly faster on a regular basis. Until comparatively recently, when computers by...
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RISC-V Gathering Momentum
I've been writing quite a bit about RISC-V (pronounced "risk five") since I think that it is going to turn out to be very significant, although it is still early days. However, momentum is truly...
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CDNLive Boston Overview
CDNLive Boston took place last week. It is really CDNLive East Coast, and there were plenty of people who had come from further afield, such as Florida and North Carolina. I came from California, along...
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Enhancing Functional Safety of Automotive ICs
Automotive ICs are expected to last 15 years, yet they are vulnerable to incredible environment- and stress-induced failures. As the industry eventually moves to full automation for vehicles,...
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Cadence Online Support — Empowering Learning! New Features from July 2016
Lots of documents are posted on Cadence Online Support on regular basis. Let us take sneak preview of recently published documents. You can access the database by logging onto...
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Nokia's Rise and Fall...and Maybe Rise Again
If you live in the US, then it is hard to believe how dominant Nokia was in mobile. For a time, one in every three mobile phones sold was a Nokia. But they were never a major force in the US for...
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Why Move Up to Allegro 17.2-2016? New Concurrent Team Design Capability...
Use teamwork to get off the critical path! When (not if) change happens or scope creeps... the PCB design team is always on the critical path. You can answer this schedule challenge by dynamically...
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SiFive: a RISC-V Fabless Semiconductor Company
A couple of weeks ago I talked to Krste Asanović and Jack Kang of SiFive. Jack is the VP of product and business development. Krste is the chief architect, and, of course, the leader of the team at UC...
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Whiteboard Wednesdays - Benefits of Cadence Hierarchical CNN Design
In this week's Whiteboard Wednesdays video, Michelle Mao talks about Cadence hierarchical CNN design for traffic sign recognition, allowing state of the art performance with less complexity. For more...
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Cadence's History with MIPI
I talked last week to Kevin Yee, Sachin Dhingra, and Moshik Rubin about the history of MIPI, Cadence's involvement with MIPI, and the upcoming MIPI DevCon that will take place on September 14 and 15 at...
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What’s for Breakfast? Preview September 12th to 16th (video)
(Please visit the site to view this video) Monday: My review of Electronic Design Automation for IC System Design, Verification and Testin g, and Electronic Design Automation for IC Implementation,...
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Facebook's Aquila Flies...and OpenCellular
In Barcelona in February I attended a "keynote' with Mark Zuckerberg which was actually an on-stage interview. To read what I said about it then, look at MWC: Zuckerberg Interview . One of the points...
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Electronic Design Automation Handbook
Way back in 2006, Luciano Lavagno, Lou Scheffer, and Grant Martin, all then at Cadence, edited a two-volume book on EDA. The first volume covered EDA for IC System Design, Verification and Testing. The...
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Integrating Electrical/Optical Co-Simulation into Photonic IC Design Flow
Traditionally, photonic ICs (PICs) have consisted of a few components and are designed as specialized, standalone devices. We’re now seeing applications for integrated photonics become proven and...
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DARPA: All Must Have Prizes
At CDNLive Boston, the invited keynote was by Dr. Bill Chappell of DARPA's Microsystems Technology Office. Since he took the position in mid-2014, he has focused the office on three key thrusts...
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Whiteboard Wednesdays - Training Different Networks Using Hierarchical CNN
In this week's Whiteboard Wednesdays video, Michelle Mao follows up on last week's video and takes a closer look at Hierarchical CNN and how to train different networks for family and member...
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Everything That's New About Ethernet
IEEE 802.3 is the standard number for various flavors of Ethernet. With Ethernet constantly increasing its speed for use in data centers, Ethernet moving into vehicles, power over Ethernet, and...
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Increasing Functional Verification Coding Process Efficiency
In EDA you traditionally have to know several modelling languages for several domains. One of those domains is functional verification. In functional verification you will be working with Hardware...
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3 Things You Didn't Know About MemCon 2016
Memcon is an event like few others, where SoC architects congregate to learn and debate the strategies of system design to keep up with the insatiable data/throughput demands of today’s electronics....
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Emulation Productivity: Beyond the Specs
At CDNLive in Boston, Andrew Ross of AMD presented a wealth of practical information about how best to use emulation. He broke things down into four main areas: hardware systems, workflow, stimulus,...
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