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3 Things You Didn't Know About MemCon 2016
Memcon is an event like few others, where SoC architects congregate to learn and debate the strategies of system design to keep up with the insatiable data/throughput demands of today’s electronics....
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What’s for Breakfast? Preview September 19th to 23rd (video)
(Please visit the site to view this video) Monday: At CDNLive Boston I moderated a panel session with east coast experts on Signal and Power Integrity. Tuesday: I present the highlights of MIPI's first...
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Are These Codecs Any Good? Netflix Tests Them
A codec compresses data for transmission. The first codec I had any close encounter with was the full-rate speech coder used in GSM. This compressed voice into 13kb/s. For comparison, wired phones...
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ESSCIRC and ESSDERC in Lausanne
Since the year 2000, the European Solid-State Device Research Conference (ESSDERC) and the European Solid-State Circuits Conference (ESSCIRC) have joined their organization committees in order to bring...
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Cadence at the VLSI Design/CAD 2016 Symposium
Great Academic Networking in Taiwan With the support of the Cadence Academic Network, Cadence Taiwan joined the 27th VLSI Design/CAD 2016 Symposium in Kaohsiung, Taiwan. Cadence connected with...
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Signal and Power Integrity Masterclass
At CDNLive Boston, I moderated a panel session on signal and power integrity with a panel of five true experts on the topics. They work on some of the highest performance systems out there. It was a...
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One Engineer's Thirst for Knowledge Takes Him from Microwave Electronics to...
Ahmadreza Farsaei doesn’t enjoy being bored—and this is a great thing for the electronics/photonics industry. Long a mainstay of academic research, photonics—the science of generating, controlling, and...
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Why Move Up to Allegro 17.2-2016? New Padstack Editor – More Than Just a New...
Customer inputs are key to product improvements I can read your minds as you digest the features and benefits of our Allegro 17.2-2016 Release. “Oh no, what have they done now to disrupt my...
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10 Top Reasons to Move Up to Allegro 17.2-2016 Release
The Allegro 17.2-2016 release, the largest in the past 10 years, became available in late April 2016. Since 17.2-2016 includes a database change that usually happens with a dot zero release, many of...
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What’s Good About Allegro PCB Editor New Concurrent Team Design? New...
The 17.2 Allegro PCB Editor has new concurrent team design capabilities. For details, please read Michael Catrambone’s blog - Why Move Up to Allegro 17.2-2016? New Concurrent Team Design Capability...
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MIPI: Not Just Mobile Any More
On September 14 and 15, MIPI held its first developer conference. For more background, see my posts Cadence's History with MIPI and MIPI SoundWire . There were two keynotes on the first day. The first...
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Analog Design Resonance: Playing with Filters
We'd like to welcome guest writer Yanyan Qiao from our Cadence Japan AE team. Many thanks for her contribution! Today analog design has become very challenging. Analog circuit designers need tools...
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Whiteboard Wednesdays - Evolution of the PCIe Standard
In this week's Whiteboard Wednesdays video, Lana Chan explores the history of PCI Express (PCIe) and how it evolved into the de facto interconnect standard it is today. (Please visit the site to view...
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שלום from CDNLive Israel
Shalom. Today is CDNLive Israel in Tel Aviv. At least getting here from San Francisco has got easier, since United now has direct flights three days a week. But for locals, it is not so easy: Commuters...
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Virtuoso Video Diary: SKILL IDE Performance Analysis Tools
As a SKILL code developer, do you spend a major chunk of your time in fine-tuning your SKILL code? I am sure nobody writes perfect code in the first attempt. Producing efficient and bug-free code...
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How to Connect Sensors with I3C
A couple of sessions at MIPI DevCon last week were on I3C. This is a new generation based on the old I 2 C standard. Confusingly, the old standard is pronounced "eye-squared-see" but the new one is...
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What’s for Breakfast? Preview September 26th to 30th (video)
(Please visit the site to view this video) Monday: System Design Enablement with Cadence and TSMC. Archtiectural power analysis Tuesday: The keynotes from TSMC OIP Symposium last week Wednesday: A...
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Mellanox: Using Palladium ICA Mode
At CDNLive Israel, Yaron Netanel of Mellanox talked about his experience with Palladium ICA mode. ICA stands for in-circuit acceleration. One basic way of using Palladium is in-circuit emulation or...
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Back in the Saddle Again
Nearly five years ago, I signed off with my last blog post in the Cadence Community. I’m delighted to return to the Cadence family and to resume my blogging activity. My former colleagues have welcomed...
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System Design Enablement with Cadence and TSMC
System-on-chip (SoC) designers are always optimizing what has become known as PPA, which stands for power, performance, and area. Almost always, the most severe constraint is on power. We can put a lot...
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