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Lip-Bu Tan Receives the Exemplary Leadership Award from GSA
Last week, Lip-Bu Tan, the CEO of Cadence, received the Dr. Morris Chang Exemplary Leadership Award from GSA. Before getting to the award, let me say a few words about who GSA are, and who Morris Chang...
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RISC-V: Codasip, BaySand, and More
Recently the RISC-V Fifth Workshop took place at Google in Mountain View. As always, there were lots of presentations from academics. RISC-V has been a big hit there as the only instruction set...
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Virtuoso Video Diary: Introducing the New Search Functionality in Hierarchy...
Are you still crawling through the set of tabs, panes, or tables in the Hierarchy Editor (HED) to find the information you are looking for? That must be frustrating, isn’t it? You could try the new...
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Why Move Up to Allegro 17.2-2016? New Design Level Checks! (Reason 9 of 10)
The Allegro PCB 17.2-2016 release is loaded with enhancements related to the DRILL. We have added Pad Definition support for the Actual Drill Tool, Backdrill Tool, Square Drill, Counter Bore/Sink...
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Whiteboard Wednesdays - Automotive Functional Safety and the ISO 26262 Standard
In this week's Whiteboard Wednesdays video, the second in a three-part series, Charles Qi continues the discussion on automotive functional safety and takes a closer look at the ISO 26262 standard....
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Branko's Elephant Chart
There are several areas where semiconductor technology and society come together. One is the future of work. As computers and deep learning get more powerful, there are a lot of jobs that potentially...
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What’s Good About Allegro PCB Editor New Concurrent Team Design? New...
The 17.2 Allegro PCB Editor has new concurrent team design capabilities. For details, please read Michael Catrambone’s blog - Why Move Up to Allegro 17.2-2016? New Concurrent Team Design Capability...
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Silicon Photonics
You probably already know that much of the traffic inside the data center, and indeed the backbones routes of the internet, all use fiber optic (glass) rather than copper. There are a number of...
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OnDemand links to our Allegro PCB & PSpice 2016 Webinars and looking to 2017...
As we wrap up 2016, I wanted to share the quick access links to all of our OnDemand Webinars from Q4 2016. ** Also, we are collecting your wishlists for 2017 webinars here. ** Please click this link to...
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Report From the 17th MTV Workshop in Austin
Austin is always a nice place to visit, and last week I spent a few days there to attend the 17th International Workshop on Microprocessor and SOC Test and Verification ( MTV ). The event is held on...
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What's For Breakfast? Video Preview January 2nd to 6th 2017
(Please visit the site to view this video) Coming from Mission San Juan Bautista, California Monday: Interview with Pat Pistilli on the origins of EDA and of DAC Tuesday: Amazon's Alexa voice user...
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Pat Pistilli: the First Cell Library, the First DRC File, the First...
You probably know that DAC is run by a company called MP Associates. It was started by Marie and Pat Pistilli (hence MP). Unfortunately Marie Pistilli died earlier this year. What is less well known is...
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Alexa: Is VUI the New GUI?
Just before the holidays I gave in and purchased an Amazon Echo, the small hockey puck one called the Echo Dot. It was on sale for under $40. To be honest, I don't need another gadget and it doesn't do...
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Whiteboard Wednesdays - Active Safety Features
In this week's Whiteboard Wednesdays video, the last in a three-part series on automotive functional safety, Charles Qi covers active safety and how Cadence Design IP implements these features. (Please...
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Dolby Atmos and Tensilica
Dolby Laboratories was founded by Ray Dolby. I always thought he was English, but it turns out he was American, although the company was indeed founded in Britain, back in 1965, hence my confusion. It...
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Bugs, Problems, Issues, and Features
There’s no better way to demonstrate the value of a verification tool than to find a killer bug in the customer’s design. When the verification engineer looks up from the screen and says, “Wow – we...
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IEDM: Coventor Panel on BEOL Challenges
At the recent IEDM in San Francisco, Coventor organized a panel titled BEOL Barricades: Navigating Future Semiconductor Yield, Reliability, and Cost Challenges . The BEOL, back end of line, is the...
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Why Move Up to Allegro 17.2-2016? Vince’s Favorite Usability Features!...
Most of the PCB designers I know are creatures of habit just like I was... we have our favorite colors, layer names, customized keyboard and our number one goal is to see how many nets we can route in...
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Mediatek's Experience with Perspec
At CDNLive in Taiwan last year, Mediatek presented their experiences with Perspec System Verifier. This post assumes that you know the basics about Perspec. If you need an introduction then look at my...
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What's For Breakfast? Video Preview January 9th to 13th 2017
(Please visit the site to view this video) Coming from Flamingo Hotel, Las Vegas at during Consumer Electronics Show (CES) Monday: The Palladium team one the ACE award for Design Team of the Year 2016...
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