Academic Network at DAC 2017
Design Automatisation Conference (DAC) is the largest EDA conference in the world, where all important players in EDA industry show their production, at the same time, it is also the most important EDA...
View ArticleWhiteboard Wednesdays - A Standard Approach to Lane Margining as Defined by...
In this week's Whiteboard Wednesdays video, IP Architect Gopi Krishnamurthy explains the lane margining requirements of the PCI Express 4.0 specification. This spec standardized the previously ad hoc...
View ArticleCactusNet: Moving Neural Nets from the Cloud to Embed Them in Cars
At the recent Autosens conference in Detroit, Cadence's Michelle (Xuehong) Mao presented on the challenge of bringing Deep Neural Nets to Embedded. I covered the first part of her talk yesterday in...
View ArticleWhat Will It Take to Bring DNN to Embedded?
If you missed Michelle Mao’s presentation at the recent Autosens conference in Detroit, “What Will It Take to Bring DNN to Embedded?”, you missed an important evaluation of how designers can do four...
View ArticleSave & Restore with More: Preserve Your Entire SoC
The concept of Save and Restore is simple: instead of re-initializing your simulation every time you want to run a test, only initialize it once. Then you can save the simulation as a “snapshot” and...
View ArticleMediatek Deploys Perspec for SoC Verification of Low Power Management
Mediatek has been using the Cadence Perspec™ System Verifier for their SoC level verification. At a recent CDNLive , Mediatek reported on their experience with Perspec and the results from their first...
View ArticleCDNDrive: Cadence Automotive IP Solutions
At CDNLive in Munich, Cadence's Robert Schweiger gave a walkthrough all of the things that Cadence is doing in automotive. Since Cadence's Virtuoso platform is a leader in analog design, Cadence has...
View ArticleMediatek Deploys Perspec for SoC Verification of Low Power Management (part 2...
Here we go through the application of Cadence Perspec™ System Verifier by Mediatek for their SoC level verification. In case you missed it, Part 1 of 3 can be found here . As shown in Figure 5 , the...
View ArticleWhat's For Breakfast? Video Preview July 17th to 21st 2017
(Please visit the site to view this video) Coming from the Cadence campus (camera Sean) Monday: SEMICON: China, China, China Tuesday: The Four Ts: Trade, Tax, Talent and Technology Funding Wednesday:...
View ArticleMentors and Advocates
“The future is already here; it’s just not very evenly distributed.”—William Gibson As I mentioned in my last blog post , I attended a Cadence round table with Lip-Bu Tan, our CEO, early last June, and...
View ArticleCDNDrive: Automotive Functional Safety
At CDNLive in Munich, Cadence's Robert Schweiger gave a walkthrough all of the things that Cadence is doing in automotive. In yesterday's post, CDNDrive: Cadence Automotive IP Solutions , I gave an...
View ArticleMediatek Deploys Perspec for SoC Verification of Low Power Management (part 3...
Here we conclude the blog series and highlight the results of Mediatek 's use of Cadence Perspec™ System Verifier for their SoC level verification. In case you missed it, Part 1 of the blog is here ,...
View ArticleWorkshops in EMEA
One of the main targets of the Cadence Academic Network is to present latest Cadence technologies to academia. Therefore, the Academic Network has organized a series of workshops on different...
View ArticleVirtuosity: More Info Button – A Shortcut to Detailed API Help Through SKILL...
The best part about programming in SKILL™ is that you don't have to build everything from scratch. Cadence provides SKILL APIs that let you quickly and easily customize existing CAD applications and...
View ArticleSEMICON: China, China, China
I have been at SEMICON West recently. Just a little introduction in case you don't know much about it. SEMICON is one of several conferences run by SEMI around the world. SEMI is the semiconductor...
View ArticleEnum compatibility error in Specman
One of my favorite quotes about SW programming is the following by Edsger Dijkstra: "If debugging is the process of removing software bugs, then programming must be the process of putting them in."...
View ArticleThe Four Ts: Trade, Tax, Talent and Technology Funding
If you work in the semiconductor industry, and you probably do if you are reading this, then you know how fascinating it is. There has never been a technology like it, that is both unbelievably complex...
View ArticleEnum compatibility error in Specman
One of my favorite quotes about SW programming is the following by Edsger Dijkstra: "If debugging is the process of removing software bugs, then programming must be the process of putting them in."...
View ArticleCDNDrive: Automotive Functional Safety
At CDNLive in Munich, Cadence's Robert Schweiger gave a walkthrough all of the things that Cadence is doing in automotive. In yesterday's post, CDNDrive: Cadence Automotive IP Solutions , I gave an...
View ArticleWhiteboard Wednesdays - Understanding the In-line ECC Architecture Required...
In this week’s Whiteboard Wednesdays video, Marc Greenberg explains the difference between error correcting code (ECC) implementation using a traditional sideband architecture vs. the new in-line ECC...
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