A Cadence Carol, Stave IV: The Last of the Spirits, Part II
This is a continuation of A Cadence Carol . Be sure to read the previous installments! Stave I: Moore’s Ghost , Part I and Part II Stave II: The First of the Three Spirits , Part I and Part II Stave...
View ArticleA Cadence Carol: Stave V, The End of It
This is a continuation of A Cadence Carol . Be sure to read the previous installments! Stave I: Moore’s Ghost , Part I and Part II Stave II: The First of the Three Spirits , Part I and Part II Stave...
View ArticleFrankenstein
"Hail to thee, blithe spirit! Bird thou never wert"...and Frankenstein. What do these two have to do with each other? And why did I pick today to ask such an odd question? You may recognize the quote...
View ArticleIntel 10nm
At IEDM last month, Intel announced details of their 10nm process. Later the same morning, they also gave details on a 22nm process, 22FFL, which is a second generation 22nm process (their first FinFET...
View ArticleWhat's For Breakfast? Video Preview January 1st to 5th 2018
https://youtu.be/Xja6H1meqac Coming from Yosemite National Park (camera Carey Guo) Monday: Frankenstein Tuesday: Intel 10nm Wednesday: Gary Patton at IEDM Thursday: CES 2017 Preview Friday:...
View ArticleFace Recognition and Hackathon: An Unlikely and Innovative Combination
Happy New Year! While most other folks are just easing back to work, those of us in the Indian semiconductor ecosystem are gearing up for one of our biggest events of the year. The first week of...
View ArticleGary Patton on GF, IBM, 7nm, EUV, and More
At IEDM in December, I sat down with Gary Patton, CTO of GLOBALFOUNDRIES, to discuss their manufacturing in general, and especially their 7nm process, EUV, and their Malta fab8, where Gary is based. We...
View ArticleSI Methodology for Multi-Gigabit Serial Link Interfaces (3 of 8)
IBIS-AMI Modeling With initial PCB trace and via models in place for our hypothetical PCI Express Gen 4 serial link, the remaining missing piece is for an IBIS-AMI model of the transmitter, with “AMI”...
View ArticleWhat's For Breakfast? Video Preview January 8th to 12th 2018
https://youtu.be/txCnT3N4OSY Coming from Executive Briefing Center (camera Sean) Monday: 2017—A Year in Breakfasts Tuesday: Virtuoso System Design Platform is Product of the Year Wednesday: Post...
View ArticleWhat is Meltdown? How Can It Affect Both Intel and Arm?
If you pay attention to anything to do with processors, security, or even investment discussion sites covering companies like Intel, you may be aware that 2018 has started with the discovery of a major...
View ArticleCES18 Preview
It's the start of a new year and that means it is the Consumer Electronics Show in Las Vegas. Although it is a zoo, it is a good place to get a feel for what is new in the consumer electronics space...
View ArticleSI Methodology for Multi-Gigabit Serial Link Interfaces (4 of 8)
Enabling Constraint-Driven Design With the pre-layout testbench built, populated with relevant models, and producing realistic simulation results, it is time to get constraints in place to drive and...
View ArticleAutomatically Reusing an SoC Testbench in AMS IP Verification
The complexity and size of mixed-signal designs in wireless, power management, automotive, and other fast growing applications requires continued advancements in a mixed-signal verification...
View ArticleAndroids and Electric Sheep
Deep into that darkness peering, long I stood there, wondering fearing, doubting, dreaming dreams no mortal ever dared to dream before. —Edgar Allan Poe I have a problem. As I try to go to sleep at...
View ArticleGLOBALFOUNDRIES 7nm
Earlier in the week, I wrote about my meeting with Gary Patton the day before GLOBALFOUNDRIES presented their 7nm process as IEDM. See Gary Patton on GF, IBM, 7nm, EUV, and More for more details....
View ArticleRegister for the UVM Register Layer Webinar on January 12!
On Friday, January 12, Doulos is hosting a UVM Register Layer webinar, with the aim of helping users model UVM in certain less-intuitive ways. This webinar will cover the usage of user-defined front...
View ArticlePortable Stimulus User Gives Perspec PSS Technology Nearly Perfect Review
It’s always good to hear what real users think of products. Here is a very detailed review (~4000 words) by an Anonymous user, nick named Ant-Man (from the movie). Overall it’s a very strong...
View Article2017: A Year in Breakfasts
So 2017 is over. Taylor Swift got into trouble for saying it was a great year and not being political enough. Well, I hope that I'm not going to get into trouble for saying 2017 was a great year for...
View ArticleVirtuoso System Design Platform Is Product of the Year
The title of this post says it all, but I'd better add a bit of color. Cadence was honored with an Electronic Products' Product of the Year award for the Virtuoso System Design Platform. This is the...
View ArticleWhiteboard Wednesdays - What to expect from TLM 2.0 Models for Memory...
In this week's Whiteboard Wednesday, Vivek Nandakumar continues his explanation of the behavioral differences between Loosely Timed (LT) and Approximately Timed (AT) TLM 2.0 models. www.youtube.com/watch
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