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Coming Soon: Asia-Pacific Mixed Signal Summit and Tech-On-Tour Events
Cadence is bringing the Analog/Mixed-Signal Summit to Shenzhen, China, and the Mixed-Signal/Low-Power Focused Technology-On-Tours to Penang and Singapore later in July 2013. Cadence will showcase...
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Innovate of Course--But Be Daring, Too
Today (July 15) is the 59th anniversary of the first American jet passenger airliner flight. It serves as a reminder, I think, of the promise and frustration of technological innovation. EDN reports...
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25 Years of Innovation at Cadence – 25 Key Milestones
Cadence is celebrating its 25th anniversary in 2013, and there's a long history of innovation to celebrate. We'll be highlighting some of that history over the next 12 months in blogs, videos, and...
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Verification IP: Five More Things I Learned By Browsing Cadence Online Support
After talking about some tips for using trace files in debugging Verification IP simulations in my last blog post, here I am back again, as promised. This time I'll discuss and provide references for...
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MemCon 2013 – Free Registration Keeps You Up-to-Date on Memory Technology
If you have any involvement or interest in semiconductor memory technology, the place to be Tuesday August 6, is the MemCon 2013 conference in Santa Clara, California. MemCon is the memory industry's...
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Great Reads (7-18-2013): Intel Milestone, Foundry Dispatches, a New Design...
What’s going on in the electronics industry this week, the week of July 15? As always, plenty. Here are some things that struck my fancy:What was Intel’s first name?Smart guys in a painful wardrobe...
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Power Integrity Solution Spans Multiple PCBs and Packages
When designing next-generation products, the common theme is"faster, smaller, cheaper". When that is combined with longer battery life and lower power consumption requirements, the design challenges...
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Hardware Computing Performance Will Stage a Comeback: IBM CTO
AUSTIN, Texas—Here's what we know: Moore's law is in trouble as physics and economics conspire to hamstring semiconductor scaling. Here's what we also know: Hardware IT as a trusted source of...
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Bluespec and Cadence: Connecting Virtual Prototypes to FPGA-Based Prototypes
Virtual prototypes and FPGA-based prototypes are both increasingly essential development platforms, each with distinctive advantages and tradeoffs. What if we could take the best of both and create a...
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Fujitsu Gets 3x Faster Regression with Incisive Simulator and Enterprise...
Verification regression consumes expensive compute resources and precious project time, so any speed-up has both a technical and business impact. As announced July 17, Fujitsu was able to improve both...
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New Specman Coverage Engine (Part II) - Using Instance-based Coverage Options...
In the last coverage blog, we showed how the extensions of covergroups under when subtypes can help us write a reusable per-instance coverage.We described a test case where a packet generator unit can...
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What's Good About ADW’s Flow Manager? 16.6 Has Many New Enhancements!
The 16.6 Allegro Design Workbench (ADW) Flow Manager has been enhanced to provide these new capabilities to improve your productivity in working through the design flow:CPM ExplorerViewing project .cpm...
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Designer View: Embedded Palladium Testbench Speeds System Bring-Up
Emulation provides blazing fast verification speeds, but you still need a good methodology to get the most value from it. At a recorded Cadence Theater presentation at the 2013 Design Automation...
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Taming the Challenges of IC Design
AUSTIN, Texas--You want the bad news first or the good news about IC design challenges?Let's start with the bad news: As IC design moves into 20nm and 16nm nodes, the challenges facing not only...
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Great Reads (7-25-2013): Robot Octopus; Death of IT; Nerd Love
This industry is not only fun to work in, it's fantastic to read about. Here are some things that struck me this week:The "vanity of trendiness"My longtime friend and old colleague Junko Yoshida hits a...
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Webinar Review: A Quick Introduction to PCIe Over M-PHY (M-PCIe)
If you're working on the design of mobile devices, the emerging PCIe over M-PHY (M-PCIe) standard could become very important to you. And if you'd like to learn more about it, a recently archived...
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Circuit Design Trends: 3D-ICs Extend Scaling
Nearly 20 years after Mark Bohr's shot heard-round-the-world on interconnect scaling and circuit design, Paul Franzon is trying to sound the all-clear. Sort of.Bohr, you'll recall, stood up at the...
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That Cowbell Must be Registered – Introducing the UVM SystemVerilog Register...
In May of 2012 we launched the initial cowbell YouTube video series on the basics of UVM for SystemVerilog IEEE 1800 and e IEEE 1647.This was followed by a video series on debugging with...
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EDA in the 1980s – the “Dazzling Decade” of Electronic Design Automation
As we celebrate the 25th anniversary of Cadence in 2013, it's interesting to reflect upon the state of the EDA industry at the time Cadence was formed. Since the two companies that merged to form...
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Moto X; Noyce Quits; China’s Chromecast (Great Reads 8-2-2013)
What's interesting this week? Plenty, as usual, and a peek at history. Read on: Moto X: context is kingThe intense tech buzz this week is all over the Moto X release, the first Motorola mobile product...
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