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Whiteboard Wednesdays—Improving Power Optimization with PCI Express
In this week's Whiteboard Wednesdays video, Arif Kahn takes a closer look at PCI Express and its role in improving power optimization.
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DAC 2014: Mixed-Signal Designers Cite Verification Challenges, Solutions
Take it from the people who do it for a living—mixed-signal IC verification is fraught with challenges that can cause tapeout delays or failures. But there are tools and methodologies that can help,...
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DAC 2014 Keynote: Hardware, Software Must Work Together to Secure Systems
One-hundred thousand new unique pieces. That's how much malware comes into existence every day and threatens electronics systems, according to McAfee.Couple that with the very complex systems we're...
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Why Cadence Bought Jasper—a New Era in Formal Analysis
Cadence today (June 16, 2014) announced the completion of its acquisition of Jasper Design Automation, a leading provider and pioneer of formal analysis and verification tools for IP and system-on-chip...
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Accellera DAC 2014 Breakfast—What Engineers Really Think About UVM
The Universal Verification Methodology (UVM) has compelling advantages for IC verification but can be challenging to adopt, according to panelists from four user companies at an Accellera breakfast at...
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Whiteboard Wednesdays - Using USB IP Controllers in Today's Devices
In this week's Whiteboard Wednesdays, Jacek Duda follows up on his earlier video focused on USB performance and now takes a closer look at USB IP controllers and their roles in today's devices.
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China Fabless Semiconductor Panel: Don’t Pack Your Bags Just Yet
Has the center of gravity for system on chip (SoC) innovation shifted to China? If you're planning to start a fabless semiconductor company, should you pack your bags, leave Silicon Valley, and head...
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DAC 2014 Keynote: Ecosystem, Innovation Crucial to Future Designs
SAN FRANCISCO--Electronics system design teams need to discard old ways of thinking, be creative, and work more collaboratively if the industry is to deliver on the promises of advanced node...
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Partner Ecosystem in Step at 2014 DAC
SAN FRANCISCO--We've known for many years how crucial the electronics ecosystem is to system design enablement in the era of ultra-deep submicron design. ARM in particular has done an effective job of...
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Amazon Fire: A New Smartphone Design Paradigm?
The release of the Amazon Fire last week is more than just a new smartphone on the marketplace and a new and intriguing initiative from Jeff Bezos and Co. It's a paradigm shift in mobile-phone design....
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DAC 2014: High-Level Synthesis (HLS) Users Share Advantages, Challenges
High-level synthesis (HLS) is an emerging IC design technology that promises huge productivity gains, but you need to understand its advantages and limitations before diving in. The best way to get...
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What's Good About Allegro PCB Editor Design Partitioning? 16.6 Has Several...
The 16.6 release of Allegro PCB Editor has several new enhancements for team design work (design partitioning) that help reduce the number of .DPF (design partition file) import/export iterations the...
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Whiteboard Wednesdays - Leading Up to PCI Express 4.0
In this week's Whiteboard Wednesdays, Moshik Rubin discusses the history of the PCI Express standard. Moshik starts with PCIe Gen1, which originated in 2002, and walks through the doubling of...
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Google Driverless Car's Sensor, Vision, and Computing Future
SANTA CLARA, Calif.--Holistic system design coupled with gradual design evolution and sensor fusion will put autonomous vehicles in every driveway. Some day. At least that was my takeaway from a recent...
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DAC 2014: 30+ Customer, Partner Presentations Now Available on Cadence.com
One of the busiest spots on the Design Automation Conference (DAC 2014) show floor was the Cadence Theater, which featured continuous customer and partner presentations over a three-day period June...
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DAC 2014 Panel: FinFET IC Design Poses No Roadblocks, but Lots of Details
FinFET transistors promise enormous power and performance advantages at process nodes below 20nm, but how will they impact IC design? If you're a digital designer, not much changes - but if you're a...
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Implementing User-Defined Register Access Policies with vr_ad and IPXACT
The register and memory package vr_ad for Specman is used in pretty much every verification environment. In most cases today, the register specification is captured in an IPXACT description and the...
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Semiconductor Industry Outlook: Enormous Opportunity, Says Jaswinder Ahuja
Jaswinder Ahuja knows EDA and he knows India. The industry veteran has worked for Cadence since its earliest days in 1988 and has led the company's India operations since 1996. He's overseen the nearly...
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Virtuosity: 21 Things I Learned in May and June 2014 by Browsing Cadence...
Application Notes1. Setting PVS to QRC av_extracted Flow with tsmc28 (& tsmc40) LVSShows you how to put in place the PVS(LVS)-QRC(av_extracted) view using TSMC files.Videos2. Mismatch Contribution...
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Partner Ecosystem in Step at 2014 DAC
SAN FRANCISCO--We've known for many years how crucial the electronics ecosystem is to system design enablement in the era of ultra-deep submicron design. ARM in particular has done an effective job of...
View Article