Clik here to view.
EE Thermal 101 – Thermal basics for Electrical Engineers (Part 4 of 4)
In part 3 of this series, we used the concept of thermal resistors to develop a thermal equivalent network of a system and determined its equivalent junction to ambient thermal resistance. With this...
View ArticleClik here to view.
Sanjay Goes to Europe via Texas
While I was in Germany recently, I sat down with the head of Cadence EMEA (Europe, Middle-East, and Africa), Sanjay Lall. Back when we were both a lot younger, we both worked at VLSI Technology. I was...
View ArticleClik here to view.
Tales From DAC: Netspeed and the Cadence Interconnect Workbench Pair Up
Services like facial detection, efficient cloud server workload management, artificial intelligence, and image enhancement are all the rage these days; but creating a design to accommodate these needs...
View ArticleClik here to view.
Virtuoso: The Next Overture: Prelude to Cadence Virtuoso "Symphony No. 18.1"
When the curtains raise on our new, novel, and innovative symphony, it will play in four movements • Hierarchical schematic driven layouts that combine the best of top-down and bottom-up design...
View ArticleClik here to view.
Evolution of DisplayPort
In 2006, the Video Electronics Standards Association (VESA) designed a new display interface to compete with HDMI: the DisplayPort. Since then DisplayPort has become more and more popular in the...
View ArticleClik here to view.
ImageNet: The Benchmark that Changed Everything
I like to date technical transitions from specific events, even though realistically they take place over an extended period. For example, I think the modern era of IC design and EDA started with the...
View ArticleClik here to view.
What's For Breakfast? Video Preview September 3rd to 7th 2018
https://youtu.be/ipUI2OaAWX4 \ Coming from the old Ambit Design Systems office on Augustine Drive (camera Bill Deegan) Monday: Labor Day Off-Topic: Almost Everyone Has More Than the Average Number of...
View ArticleClik here to view.
Whiteboard Wednesdays - The Simplest Neural Network Explanation Ever - Part 2
In this week's Whiteboard Wednesday, Tom Hackett continues his explanation of neural network basics using an Excel spreadsheet as a learning vehicle. You can download the spreadsheet here:...
View ArticleClik here to view.
Carbon Nanotube Memory: Too Good to Be True?
One of the sessions at HOT CHIPS is on new technologies, and one of those presentations was by Bill Gervasi of Nantero on Architecture for Carbon Nanotube Based Memory (NRAM) . The technology sounds...
View ArticleClik here to view.
Virtuoso: 新序曲-DRD推出新界面
新版的Virtuoso平台（*ICADVM18.1）提供了突破性的分析功能和创新的仿真驱动布局，实现了更强大，更高效的设计，支持最先进的工艺技术。基于该解决方案，我们能够通过最先进的方法来显著提高生产力，并且提供业内最全面的解决方案，能实现芯片，封装，模块和电路板间相互操作的流程。 *该功能也能用于IC6.1.8的成熟工艺节点。 最近几个月，如果您关注Cadence...
View ArticleClik here to view.
Don't Miss These 6 Things At CDNLive India 2018!
1. The Cadence keynotes: Lip-Bu Tan on Day 1 and Babu Mandava on Day 2 Apart from being part of the executive management team at Cadence, both Lip-Bu and Babu are veterans of the industry. They have a...
View ArticleClik here to view.
Great Academic Networking in Taiwan - 2018 VLSI Design/CAD Symposium
Cadence Academic Network and Taiwan Marketing co-supported the annual VLSI Design/CAD Symposium in Taiwan for the 3rd consecutive year. This year, around 800 local industry experts, academic experts,...
View ArticleClik here to view.
Google's Titan: How They Stop You Slipping a Bogus Server into Their Datacenter
At the recent HOT CHIPS conference, Scott Johnson of Google talked about some challenges that Google has. There have been stories about hackers infiltrating malware into the supply chain. Given the...
View ArticleClik here to view.
Adding a Patch Just in Time! — Or Can You Really Allow Yourself to Waste So...
One animation video - Patch Like The Wind - is worth a thousand words :) If you don’t use Specman or don’t use Specman correctly, you spend most of your time waiting for compilation to finish. One of...
View ArticleClik here to view.
Virtuoso: 新序曲—设计意图工具（Design Intent）工具简介
新版的Virtuoso平台（*ICADVM18.1）提供了突破性的分析功能和创新的仿真驱动布局，实现了更强大，更高效的设计，支持最先进的工艺技术。基于该解决方案，我们能够通过最先进的方法来显著提高生产力，并且提供业内最全面的解决方案，能实现芯片，封装，模块和电路板间相互操作的流程。 *该功能也能用于IC6.1.8的成熟工艺节点。...
View ArticleClik here to view.
Breakfast Buffet for August
https://youtu.be/elQgyXvkcjU The three highlighted posts for August were: Two posts on Shockley Labs: The Birthplace of Silicon Valley: 391 South San Antonio Road The Brief but Spectacular History of...
View ArticleClik here to view.
HOT CHIPS Tutorial: On-Device Inference
The Sunday of the annual HOT CHIPS (the 30th!) conference is tutorial day. In the morning, it was the Blockchain, which I missed due to other commitments. in the afternoon it was Deep Learning. This...
View ArticleClik here to view.
为什么电源完整性(PI)是个“热”话题————如何进行电/热协同仿真
在设计新一代产品时，我们共同追求的目标都是“更快，更小，更便宜”。然而当这与更长的电池寿命和更低的功耗要求相遇时，就向我们提出了艰巨的设计挑战。唯一可以肯定的是，项目开发进度并不会因为我们需要克服挑战而延期。 每个电子产品的设计师无疑都需要能够 分析供电网络...
View ArticleClik here to view.
升级到Allegro17.2-2016的10大理由之1：先进的柔性和刚柔结合板设计支持
为何要刚柔结合？ 对几乎所有应用，客户一直希望能有更小、更轻、性价比更高的产品。竞争压力也促使设计工程师们以不断增长的速度将这些新产品带到市场。设计工程师们可使用柔性PCB材料（柔性/刚柔结合）来满足小型化需求、代替连接器，以提高产品性能。 (点击查看大图） 有哪些新技术可支持刚柔结合设计？ 制造商对设计的进一步要求已准备好，如在柔性衬底上实现元件安装，支持多层柔性板以缩小尺寸，并提高高速性能。...
View ArticleClik here to view.
升级到Allegro17.2-2016的10大理由之2：新的实时并行团队设计功能
利用团队设计实现快速设计 无论如何，PCB团队设计总是实现快速设计的最佳捷径。您可以使用Allegro 17.2...
View Article