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Debugging Multi-Language Verification Environments
As shown in previous blog posts in the Multi-Language Verification Environment series, creating multi-language verification environments is not difficult. Using UVM-ML, we can pass data between...
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The Dark Side of Constraints on 'do-not-generate' Fields
The art of expressing hardware functionality through constraint language is often one of the trickiest parts of functional verification. Unlike procedural actions that are executed locally one by one,...
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Designing a Complex Leadframe Package? See How SiP Layout Tool Can Cover All...
Leadframe package designs are here to stay, and they are getting more complex with every passing year. New materials and manufacturing processes allow for the inclusion of more active and passive...
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Performance and the Use of Port mvl Lists (or, Nothing in Life is Free…)
When connecting to the DUT signals, we usually refer to the values as 0s or 1s. But sometimes there is a need to know the exact multi-value logic, or to write an mvl value (e.g., init the signal to Z)....
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Q&A with Richard Goering—Longtime Electronics Industry Journalist
Three decades—the rough time span for Saturn to orbit the sun, for the human male brain to reach full maturity, and for the newest Star Wars installment to pick up where Return of the Jedi left off....
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BGA Ball Map Creation
Are you responsible for the creation and management of a BGA ball map or a die bump map of a packaged chip design? How much time do you spend creating these maps? How do these maps drive physical...
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Call for Papers for MemCon Closes This Friday
You still have a chance to get a paper accepted at the premier conference for memory technology— MemCon 2015 . Yes, on Tuesday, October 13, 2015, the brightest minds in memory technology will meet...
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Whiteboard Wednesdays—Specialty Memories
In this week's Whiteboard Wednesdays video, Lou Ternullo takes a closer look at what to consider when you are considering specialty memories, such as Wide I/O, HBM, and HMC. (Please visit the site to...
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What's Good About Allegro PCB Editor Embedded Cavity DRCs? It's NEW in the...
Max cavity size and max cavity component count were offered as reports in the 16.5 release and are now available as DRCs in the 16.6 release of Allegro PCB Editor . Fab houses supporting embedded...
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Extending the e Language with Anonymous Methods
We're happy to have guest blogger Thorsten Dworzak describe how he added anonymous methods to the vlab_util package from Verilab. So here it goes: Many programming languages like Python, Perl, and Ruby...
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MaxLinear Addresses Capacity, Runtime, and Correlation Challenges with New...
MaxLinear, a developer of analog RF front-end semiconductors, previously used Cadence Encounter Digital Implementation System to tape out its chips. After getting an introduction to the new Cadence...
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Hot Summer for the High-Level Synthesis Community
Summer is usually a slow time of the year due to vacations, beautiful weather, and backyard barbeques. But for the HLS community, this summer has started off hot. At the 2015 Design Automation...
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Whiteboard Wednesdays—Understanding Camera Subsystems
In this week's Whiteboard Wednesdays video, Pulin Desai provides an overview of a camera subsystem used in mobile, automotive, security, and PC applications. (Please visit the site to view this video)
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Use Model Versatility is Key for Emulation Returns on Investment
It is always great to see when customers confirm what we in product management put forward as key elements for our product. As my team owns the product management for emulation, DAC 2015 in San...
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Q&A with Avinash Lingamneni—Tensilica R&D Team
Dr. Avinash Lingamneni is a lead design engineer on the Tensilica R&D team, which develops Cadence’s Tensilica Fusion DSP. The Fusion DSP provides a flexible architecture for Internet of Things...
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Use Model Versatility Is Key for Emulation Returns on Investment
It is always great to see when customers confirm what we in product management put forward as key elements for our product. As my team owns the product management for emulation, DAC 2015 in San...
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USB Type-C Interoperability Workshop—True, Real-Life Validation
There’s no denying that USB Type-C is the fastest adopted specification in the history of USB. Just by looking at the number of companies implementing the specification that was released only 10 months...
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Make Your Debugging Faster by Recording Your Simulator
One of the famous quotes of Brian Kernighan is: "Debugging is twice as hard as writing the code in the first place. Therefore, if you write the code as cleverly as possible, you are, by definition, not...
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Whiteboard Wednesdays—Extending a Processor’s Instruction Set
In this week’s Whiteboard Wednesdays video, Chris Rowen explains the benefits of extending a processor’s instruction set to achieve higher performance and lower energy. (Please visit the site to view...
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DAC 2015: IoT's Long Winding Road
SAN FRANCISCO—On the long winding road to the Internet of Things, are we there yet? That was the very question addressed by a panel at the 52nd Design Automation Conference here (June 11): “The Long...
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