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Fine Tuning of Coverage Model Definition
Functional Coverage is one of the main means to measure the quality and progress of the verification project. We define coverage models, run semi-random tests, and every once in a while analyze the...
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Hierarchical Neural Networks
The German Traffic Sign Benchmark actually has the signs divided into groups: speed limits, danger signs, and so on. It turns out that humans make far fewer errors between groups than within groups....
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Meet the Winners of Tensilica Xtensa Embedded DSP Design Contest India 2016
The winners of the Tensilica Xtensa Embedded DSP Design Contest have been announced! The winning team members from CMR Institute of Technology, Bengaluru and Bangladesh University of Engineering and...
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The Future of Neural Networks...and Our Robot Overlords
Chris Rowen, the CTO of the Cadence IP group, wrapped up the recent seminar in Las Vegas (see Breakfast Bytes for the last three days) by giving a vision for the future of neural networks and deep...
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Building the Cars of the Future
The big buzz in the automotive industry lately is autonomous driving vehicles. Companies like Mercedes, BMW, Google, and Tesla have already released, or are soon to release, self-driving features that...
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Softbank Buys ARM for $32B
Over the weekend it seems that Softbank have closed a deal to acquire ARM Holdings (what we in the industry simply think of as ARM) for an all-cash deal for around $32B. The deal is expected to be...
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DAC 2016: Dealing with Extreme Physical and Electrical Challenges at Advanced...
What kinds of techniques are you employing to address physical and electrical challenges at advanced nodes? At 10nm and beyond, you’ll need to start addressing coloring. When you get to 7nm,...
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What’s New with Hybrid Memory Cube (HMC)
Hybrid Memory Cube (HMC) is a memory architecture that was developed by Micron in 2011. It was developed in response to the high-bandwidth, high-efficiency memory requirements of multi-core processing...
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PCI Express Trends and News at PCI-SIG 2016
PCI-SIG Developers Conference 2016 is now history, taking place at the Santa Clara Convention Center at 28 th -29 th June, once again proving it’s not an event you want to miss. With PCIe 4.0 standard...
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Linley Mobile Conference...and That ARM Deal
This year's Linley Mobile and Wearables Conference is coming up next week on July 26 and 27 in the Hyatt in Santa Clara. I'm sure Linley Gwenap is furiously rewriting his keynote on the mobile industry...
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IEEE Recognition of Cadence Software at DAC 2016
Cadence was awarded with the IEEE Donald O. Pederson Best Paper Award—EDA’s most prestigious recognition of its kind—for the best paper published in IEEE Transactions on CAD over the past two years....
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Virtuoso Variation Option: Reliable High Yield Design with Scaled-Sigma Sampling
What’s Scaled-Sigma Sampling? Scaled-Sigma Sampling (SSS) is an efficient algorithm to solve the high yield estimation problem, which happens when your circuit needs to have really low failure rate,...
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Whiteboard Wednesdays—Applying Deep Learning to Our Daily Lives
In this week's Whiteboard Wednesdays video, Samer Hijazi discusses bringing deep learning to embedded devices. (Please visit the site to view this video)
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Economic Uncertainty, the Global Economy and Semiconductors
The Monday before SEMICON West starts, there are two events that run in parallel in the Marriott Hotel. One is imec's US technology forum. Since I already attended the two-day version in Brussels, and...
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What's Good About Allegro PCB Editor Snake Router? The 16.6-2015 Release Has...
With the 16.6-2015 Allegro PCB Editor release, the Snake pattern router can be enabled from the context menu of the Add Connect command. This functionality provides the ability to route through hex...
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Doing Away With the Docking Station
My docking station with the rat’s nest of wires dangling from behind it could be going the way of the Dodo bird soon, thanks to USB Power Delivery (PD) protocols and USB Type-C connectors. The...
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Needs of Energy-Efficient Networking While Using 10 Gigabit Ethernet
Growing deployment level of 10 Gigabit Ethernet in datacenters and automotive infotainment is driving the demand and the connectivity needs of a broad range of high-end, energy-efficient networking and...
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200mm Fabs Awaken
Modern fabs use 300mm (12") wafers. Older fabs have used 200mm (8") wafers since the early '90s, starting with IBM Fishkill's pilot with Siemens to build 64Mb DRAM in 1990. Before that, we had 5"...
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10 Top Reasons to Move Up to Allegro 17.2-2016 Release
The Allegro 17.2-2016 release, the largest in the past 10 years, became available in late April 2016. Since 17.2-2016 includes a database change that usually happens with a dot zero release, many of...
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System-Level Functional Verification and Power Analysis
With DAC and other events during May and June, I am only now wrapping up stuff I wanted to write about from EDPS in Monterey. Cadence's T.C.Lin presented about the importance of system-level power and...
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